From 4b91acba17a4d3a3205e99da5d69844a83da2c43 Mon Sep 17 00:00:00 2001
From: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Date: Thu, 7 Feb 2019 10:53:37 +0100
Subject: Implement BSHFL instruction and ignore RDHWR instruction.

---
 qtmips_machine/alu.cpp         |  2 ++
 qtmips_machine/instruction.cpp | 72 +++++++++++++++++++++++++++++++++++++++++-
 qtmips_machine/machinedefs.h   |  3 +-
 3 files changed, 75 insertions(+), 2 deletions(-)

(limited to 'qtmips_machine')

diff --git a/qtmips_machine/alu.cpp b/qtmips_machine/alu.cpp
index 8016444..2ac27a5 100644
--- a/qtmips_machine/alu.cpp
+++ b/qtmips_machine/alu.cpp
@@ -128,6 +128,8 @@ std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::u
             return (s < t) ? 1 : 0;
         case ALU_OP_LUI:
             return t << 16;
+        case ALU_OP_BSHFL:
+            return (uint32_t)(int32_t)(int8_t)t;
         case  ALU_OP_PASS_T: // Pass s argument without change for JAL
             return t;
         case ALU_OP_BREAK:
diff --git a/qtmips_machine/instruction.cpp b/qtmips_machine/instruction.cpp
index 9df45d8..db58d2a 100644
--- a/qtmips_machine/instruction.cpp
+++ b/qtmips_machine/instruction.cpp
@@ -160,6 +160,75 @@ static const struct InstructionMap  alu_instruction_map[] = {
      .flags = FLAGS_ALU_T_R_STD},
 };
 
+static const struct InstructionMap  special3_instruction_map[] = {
+    IM_UNKNOWN,	//	0
+    IM_UNKNOWN,	//	1
+    IM_UNKNOWN,	//	2
+    IM_UNKNOWN,	//	3
+    IM_UNKNOWN,	//	4
+    IM_UNKNOWN,	//	5
+    IM_UNKNOWN,	//	6
+    IM_UNKNOWN,	//	7
+    IM_UNKNOWN,	//	8
+    IM_UNKNOWN,	//	9
+    IM_UNKNOWN,	//	10
+    IM_UNKNOWN,	//	11
+    IM_UNKNOWN,	//	12
+    IM_UNKNOWN,	//	13
+    IM_UNKNOWN,	//	14
+    IM_UNKNOWN,	//	15
+    IM_UNKNOWN,	//	16
+    IM_UNKNOWN,	//	17
+    IM_UNKNOWN,	//	18
+    IM_UNKNOWN,	//	19
+    IM_UNKNOWN,	//	20
+    IM_UNKNOWN,	//	21
+    IM_UNKNOWN,	//	22
+    IM_UNKNOWN,	//	23
+    IM_UNKNOWN,	//	24
+    IM_UNKNOWN,	//	25
+    IM_UNKNOWN,	//	26
+    IM_UNKNOWN,	//	27
+    IM_UNKNOWN,	//	28
+    IM_UNKNOWN,	//	29
+    IM_UNKNOWN,	//	30
+    IM_UNKNOWN,	//	31
+    {"BSHFL", IT_R, ALU_OP_BSHFL, NOMEM, nullptr,
+     .flags = FLAGS_ALU_T_R_TD},
+    IM_UNKNOWN,	//	33
+    IM_UNKNOWN,	//	34
+    IM_UNKNOWN,	//	35
+    IM_UNKNOWN,	//	36
+    IM_UNKNOWN,	//	37
+    IM_UNKNOWN,	//	38
+    IM_UNKNOWN,	//	39
+    IM_UNKNOWN,	//	40
+    IM_UNKNOWN,	//	41
+    IM_UNKNOWN,	//	42
+    IM_UNKNOWN,	//	43
+    IM_UNKNOWN,	//	44
+    IM_UNKNOWN,	//	45
+    IM_UNKNOWN,	//	46
+    IM_UNKNOWN,	//	47
+    IM_UNKNOWN,	//	48
+    IM_UNKNOWN,	//	49
+    IM_UNKNOWN,	//	50
+    IM_UNKNOWN,	//	51
+    IM_UNKNOWN,	//	52
+    IM_UNKNOWN,	//	53
+    IM_UNKNOWN,	//	54
+    IM_UNKNOWN,	//	55
+    IM_UNKNOWN,	//	56
+    IM_UNKNOWN,	//	57
+    IM_UNKNOWN,	//	58
+    {"RDHWR", IT_R, ALU_OP_NOP, NOMEM, nullptr,
+     .flags = FLAGS_ALU_T_R_TD},
+    IM_UNKNOWN,	//	60
+    IM_UNKNOWN,	//	61
+    IM_UNKNOWN,	//	62
+    IM_UNKNOWN,	//	63
+};
+
 static const struct InstructionMap  regimm_instruction_map[] = {
     {"BLTZ", IT_I, NOALU, NOMEM, nullptr,       // BLTZ
      .flags = IMF_SUPPORTED | IMF_BJR_REQ_RS | IMF_BRANCH},
@@ -261,7 +330,8 @@ static const struct InstructionMap instruction_map[] = {
     IM_UNKNOWN,  // 28
     IM_UNKNOWN,  // 29
     IM_UNKNOWN,  // 30
-    IM_UNKNOWN,  // 31
+    {"SPECIAL3", IT_R, NOALU, NOMEM, special3_instruction_map, //
+    .flags = IMF_SUB_ENCODE(6, 0)},
     {"LB",     IT_I, ALU_OP_ADDU, AC_BYTE, nullptr,  // LB
      .flags = FLAGS_ALU_I_LOAD},
     {"LH",     IT_I, ALU_OP_ADDU, AC_HALFWORD, nullptr,  // LH
diff --git a/qtmips_machine/machinedefs.h b/qtmips_machine/machinedefs.h
index 526a05e..7d21f69 100644
--- a/qtmips_machine/machinedefs.h
+++ b/qtmips_machine/machinedefs.h
@@ -84,7 +84,8 @@ enum AluOp : std::uint8_t {
     ALU_OP_NOR,
     ALU_OP_SLT,
     ALU_OP_SLTU,
-    ALU_OP_LUI, // We don't care about exact index for this one
+    ALU_OP_LUI,
+    ALU_OP_BSHFL,
     ALU_OP_PASS_T, // Pass t argument without change for JAL
     ALU_OP_BREAK,
     ALU_OP_SYSCALL,
-- 
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