From 04ea2670be26291a17808bd704ce3549795953a0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Karel=20Ko=C4=8D=C3=AD?= <cynerd@email.cz>
Date: Tue, 5 Sep 2017 00:31:13 +0200
Subject: Add some more instructions to be decoded and arithmetic I test

---
 qtmips_machine/instruction.cpp | 63 ++++++++++++++++++++++++++++++++++++------
 1 file changed, 54 insertions(+), 9 deletions(-)

(limited to 'qtmips_machine/instruction.cpp')

diff --git a/qtmips_machine/instruction.cpp b/qtmips_machine/instruction.cpp
index e03f794..1771afb 100644
--- a/qtmips_machine/instruction.cpp
+++ b/qtmips_machine/instruction.cpp
@@ -1,6 +1,51 @@
 #include "instruction.h"
+#include "qtmipsexception.h"
 
-InstructionR::InstructionR(std::uint8_t rs, std::uint8_t rd, std::uint8_t rt, std::uint8_t sa) {
+Instruction::Instruction() {
+    this->st = IS_FETCH;
+}
+
+void Instruction::decode(Registers *regs) {
+    if (this->st != IS_FETCH)
+        // TODO other exception
+        throw std::exception();
+    this->st = IS_DECODE;
+}
+
+void Instruction::execute() {
+    if (this->st != IS_DECODE)
+        // TODO other exception
+        throw std::exception();
+    this->st = IS_EXECUTE;
+}
+
+void Instruction::memory(Memory *mem) {
+    if (this->st != IS_EXECUTE)
+        // TODO other exception
+        throw std::exception();
+    this->st = IS_MEMORY;
+}
+
+void Instruction::write_back(Registers *regs) {
+    if (this->st != IS_MEMORY)
+        // TODO other exception
+        throw std::exception();
+    this->st = IS_WRITE_BACK;
+}
+
+enum InstructionState Instruction::state() {
+    return this->st;
+}
+
+bool Instruction::running() {
+    return this->st > IS_FETCH && this->st < IS_WRITE_BACK;
+}
+
+bool Instruction::done() {
+    return this->st >= IS_WRITE_BACK;
+}
+
+InstructionR::InstructionR(std::uint8_t rs, std::uint8_t rd, std::uint8_t rt, std::uint8_t sa) : Instruction() {
     this->rs = rs;
     this->rd = rd;
     this->rt = rt;
@@ -14,17 +59,17 @@ QVector<QString> InstructionR::to_strs() {
     // Instruction name
     str << "unknown"; // unknown instruction, should be replaced by child
     // Source register
-    str << QString::number((unsigned)this->rs, 16);
+    str << QString::number((unsigned)this->rs, 10);
     // Target register
-    str << QString::number((unsigned)this->rt, 16);
+    str << QString::number((unsigned)this->rt, 10);
     // Destination register
-    str << QString::number((unsigned)this->rd, 16);
+    str << QString::number((unsigned)this->rd, 10);
     // Shift amount
-    str << QString::number((unsigned)this->sa, 16);
+    str << QString::number((unsigned)this->sa, 10);
     return str;
 }
 
-InstructionI::InstructionI(std::uint8_t rs, std::uint8_t rt, std::uint16_t immediate) {
+InstructionI::InstructionI(std::uint8_t rs, std::uint8_t rt, std::uint16_t immediate) : Instruction() {
     this->rs = rs;
     this->rt = rt;
     this->immediate = immediate;
@@ -35,15 +80,15 @@ QVector<QString> InstructionI::to_strs() {
     // Instruction name
     str << "unknown"; // unknown instruction, should be replaced by child
     // Source register
-    str << QString::number((unsigned)this->rs, 16);
+    str << QString::number((unsigned)this->rs, 10);
     // Target register
-    str << QString::number((unsigned)this->rt, 16);
+    str << QString::number((unsigned)this->rt, 10);
     // Immediate value
     str << QString::number((unsigned)this->immediate, 16);
     return str;
 }
 
-InstructionJ::InstructionJ(std::uint32_t address) {
+InstructionJ::InstructionJ(std::uint32_t address) : Instruction() {
     this->address = address;
 }
 
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