From b1f0e4fcc83c7692f4b066fcc026d77a051c1d7d Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Thu, 31 Jan 2019 11:45:41 +0100 Subject: Include support for JALR support. Signed-off-by: Pavel Pisa --- qtmips_machine/core.cpp | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'qtmips_machine/core.cpp') diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp index 6443be1..2ff528d 100644 --- a/qtmips_machine/core.cpp +++ b/qtmips_machine/core.cpp @@ -134,6 +134,7 @@ struct Core::dtDecode Core::decode(const struct dtFetch &dt) { std::uint32_t val_rs = regs->read_gp(dt.inst.rs()); std::uint32_t val_rt = regs->read_gp(dt.inst.rt()); std::uint32_t immediate_val; + bool regd31 = dec.flags & DM_PC_TO_R31; if (dec.flags & DM_ZERO_EXTEND) immediate_val = dt.inst.immediate(); @@ -153,19 +154,23 @@ struct Core::dtDecode Core::decode(const struct dtFetch &dt) { emit decode_rs_num_value(dt.inst.rs()); emit decode_rt_num_value(dt.inst.rt()); emit decode_rd_num_value(dt.inst.rd()); - emit decode_regd31_value((bool)(dec.flags & DM_PC_TO_R31)); + emit decode_regd31_value(regd31); - if (dec.flags & DM_PC_TO_R31) { + if (regd31) { val_rs = dt.inst_addr + 8; } + if ((dt.inst.opcode() == 0 && dt.inst.funct() == ALU_OP_JALR)) { + val_rt = dt.inst_addr + 8; + } + return { .inst = dt.inst, .memread = dec.flags & DM_MEMREAD, .memwrite = dec.flags & DM_MEMWRITE, .alusrc = dec.flags & DM_ALUSRC, .regd = dec.flags & DM_REGD, - .regd31 = dec.flags & DM_PC_TO_R31, + .regd31 = regd31, .regwrite = dec.flags & DM_REGWRITE, .aluop = dt.inst.opcode() == 0 ? (enum AluOp)dt.inst.funct() : dec.alu, .memctl = dec.mem_ctl, -- cgit v1.2.3