From 476af4ac713b88597e628ff8415ae2890757d574 Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Tue, 2 Apr 2019 17:02:20 +0200 Subject: Implement stall cycles counter and view of CPU cycles counter. Signed-off-by: Pavel Pisa --- qtmips_machine/core.cpp | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'qtmips_machine/core.cpp') diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp index 9e285a4..88b2fe2 100644 --- a/qtmips_machine/core.cpp +++ b/qtmips_machine/core.cpp @@ -43,6 +43,7 @@ Core::Core(Registers *regs, MemoryAccess *mem_program, MemoryAccess *mem_data, unsigned int min_cache_row_size, Cop0State *cop0state) : ex_handlers(), hw_breaks() { cycle_c = 0; + stall_c = 0; this->regs = regs; this->cop0state = cop0state; this->mem_program = mem_program; @@ -61,11 +62,13 @@ Core::Core(Registers *regs, MemoryAccess *mem_program, MemoryAccess *mem_data, void Core::step(bool skip_break) { cycle_c++; + emit cycle_c_value(cycle_c); do_step(skip_break); } void Core::reset() { cycle_c = 0; + stall_c = 0; do_reset(); } @@ -903,6 +906,10 @@ void CorePipelined::do_step(bool skip_break) { } // emit instruction_decoded(dt_d.inst, dt_d.inst_addr, dt_d.excause, dt_d.is_valid); } + if (stall || dt_d.stop_if) { + stall_c++; + emit stall_c_value(stall_c); + } } void CorePipelined::do_reset() { -- cgit v1.2.3