From 361f5aab10d72e2200dfc7985a1511044b987db8 Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Sun, 3 Feb 2019 23:03:59 +0100 Subject: Correct memory view updates for uncached and write-through case. Signed-off-by: Pavel Pisa --- qtmips_machine/cache.cpp | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) (limited to 'qtmips_machine/cache.cpp') diff --git a/qtmips_machine/cache.cpp b/qtmips_machine/cache.cpp index acc48b1..9f4bfb0 100644 --- a/qtmips_machine/cache.cpp +++ b/qtmips_machine/cache.cpp @@ -40,17 +40,18 @@ Cache::Cache(Memory *m, const MachineConfigCache *cc, unsigned memory_access_pen } } -void Cache::wword(std::uint32_t address, std::uint32_t value) { +bool Cache::wword(std::uint32_t address, std::uint32_t value) { + bool changed; if (!cnf.enabled()) { - mem->write_word(address, value); - return; + return mem->write_word(address, value); } std::uint32_t data; - access(address, &data, true, value); + changed = access(address, &data, true, value); if (cnf.write_policy() == MachineConfigCache::WP_TROUGH) - mem->wword(address, value); + return mem->wword(address, value); + return changed; } std::uint32_t Cache::rword(std::uint32_t address) const { @@ -131,7 +132,8 @@ const MachineConfigCache &Cache::config() const { return cnf; } -void Cache::access(std::uint32_t address, std::uint32_t *data, bool write, std::uint32_t value) const { +bool Cache::access(std::uint32_t address, std::uint32_t *data, bool write, std::uint32_t value) const { + bool changed = false; address = address >> 2; unsigned ssize = cnf.blocks() * cnf.sets(); std::uint32_t tag = address / ssize; @@ -218,10 +220,13 @@ void Cache::access(std::uint32_t address, std::uint32_t *data, bool write, std:: cd.tag = tag; *data = cd.data[col]; - if (write) + if (write) { + changed = cd.data[col] != value; cd.data[col] = value; + } emit cache_update(indx, row, cd.valid, cd.dirty, cd.tag, cd.data); + return changed; } void Cache::kick(unsigned associat_indx, unsigned row) const { -- cgit v1.2.3