From 53c75d278a958e40b9c0b0ca3b04cfb11f356827 Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Sun, 3 Feb 2019 10:33:05 +0100 Subject: Implement instructions MULT, MULTU, DIV, DIVU. Signed-off-by: Pavel Pisa --- qtmips_machine/alu.cpp | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'qtmips_machine/alu.cpp') diff --git a/qtmips_machine/alu.cpp b/qtmips_machine/alu.cpp index 176a9a5..bb3a745 100644 --- a/qtmips_machine/alu.cpp +++ b/qtmips_machine/alu.cpp @@ -5,6 +5,9 @@ using namespace machine; std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::uint32_t t, std::uint8_t sa, Registers *regs) { + std::int64_t s64_val; + std::uint64_t u64_val; + switch(operation) { case ALU_OP_SLL: return t << sa; @@ -42,6 +45,24 @@ std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::u case ALU_OP_MTLO: regs->write_hi_lo(false, s); return 0x0; + case ALU_OP_MULT: + s64_val = (std::int64_t)(std::int32_t)s * (std::int32_t)t; + regs->write_hi_lo(false, (std::uint32_t)(s64_val & 0xffffffff)); + regs->write_hi_lo(true, (std::uint32_t)(s64_val >> 32)); + return 0x0; + case ALU_OP_MULTU: + u64_val = (std::uint64_t)s * t; + regs->write_hi_lo(false, (std::uint32_t)(u64_val & 0xffffffff)); + regs->write_hi_lo(true, (std::uint32_t)(u64_val >> 32)); + return 0x0; + case ALU_OP_DIV: + regs->write_hi_lo(false, (std::uint32_t)((std::int32_t)s / (std::int32_t)t)); + regs->write_hi_lo(true, (std::uint32_t)((std::int32_t)s % (std::int32_t)t)); + return 0x0; + case ALU_OP_DIVU: + regs->write_hi_lo(false, s / t); + regs->write_hi_lo(true, s % t); + return 0x0; case ALU_OP_ADD: /* s(31) ^ ~t(31) ... same signs on input */ /* (s + t)(31) ^ s(31) ... different sign on output */ -- cgit v1.2.3