From 9a3b0dccb3dcb958b6a5c0cd72e8684887b4c4bf Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Karel=20Ko=C4=8D=C3=AD?= <cynerd@email.cz>
Date: Thu, 11 Jan 2018 22:44:27 +0100
Subject: Allow instruction trace from any stage

In reality this internally allows us to see stages even it we are not
using pipelining but that is hidden from outside simply to not confuse
user.
---
 qtmips_cli/main.cpp   | 16 +++++++++++++++-
 qtmips_cli/tracer.cpp | 38 +++++++++++++++++++++++++++++++++++---
 qtmips_cli/tracer.h   | 14 +++++++++++---
 3 files changed, 61 insertions(+), 7 deletions(-)

(limited to 'qtmips_cli')

diff --git a/qtmips_cli/main.cpp b/qtmips_cli/main.cpp
index 57187ce..fedf14d 100644
--- a/qtmips_cli/main.cpp
+++ b/qtmips_cli/main.cpp
@@ -18,7 +18,11 @@ void create_parser(QCommandLineParser &p) {
     p.addOptions({
         {"pipelined", "Configure CPU to use five stage pipeline."},
         {"no-delay-slot", "Disable jump delay slot."},
-        {{"trace-fetch", "tr-fetch"}, "Trace fetched instruction."},
+        {{"trace-fetch", "tr-fetch"}, "Trace fetched instruction (for both pipelined and not core)."},
+        {{"trace-decode", "tr-decode"}, "Trace instruction in decode stage. (only for pipelined core)"},
+        {{"trace-execute", "tr-execute"}, "Trace instruction in execute stage. (only for pipelined core)"},
+        {{"trace-memory", "tr-memory"}, "Trace instruction in memory stage. (only for pipelined core)"},
+        {{"trace-writeback", "tr-writeback"}, "Trace instruction in write back stage. (only for pipelined core)"},
         {{"trace-pc", "tr-pc"}, "Print program counter register changes."},
         {{"trace-gp", "tr-gp"}, "Print general purpose register changes. You can use * for all registers.", "REG"},
         {{"trace-lo", "tr-lo"}, "Print LO register changes."},
@@ -44,6 +48,16 @@ void configure_machine(QCommandLineParser &p, MachineConfig &cc) {
 void configure_tracer(QCommandLineParser &p, Tracer &tr) {
     if (p.isSet("trace-fetch"))
         tr.fetch();
+    if (p.isSet("pipelined")) { // Following are added only if we have stages
+        if (p.isSet("trace-decode"))
+            tr.decode();
+        if (p.isSet("trace-execute"))
+            tr.execute();
+        if (p.isSet("trace-memory"))
+            tr.memory();
+        if (p.isSet("trace-writeback"))
+            tr.writeback();
+    }
 
     if (p.isSet("trace-pc"))
         tr.reg_pc();
diff --git a/qtmips_cli/tracer.cpp b/qtmips_cli/tracer.cpp
index ca66e09..4438fd8 100644
--- a/qtmips_cli/tracer.cpp
+++ b/qtmips_cli/tracer.cpp
@@ -25,7 +25,23 @@ Tracer::Tracer(QtMipsMachine *machine) {
     } while(false)
 
 void Tracer::fetch() {
-    CON(con_fetch, machine->core(), instruction_fetched(machine::Instruction&), instruction_fetch(machine::Instruction&));
+    CON(con_fetch, machine->core(), instruction_fetched(const machine::Instruction&), instruction_fetch(const machine::Instruction&));
+}
+
+void Tracer::decode() {
+    CON(con_fetch, machine->core(), instruction_decoded(const machine::Instruction&), instruction_decode(const machine::Instruction&));
+}
+
+void Tracer::execute() {
+    CON(con_fetch, machine->core(), instruction_executed(const machine::Instruction&), instruction_execute(const machine::Instruction&));
+}
+
+void Tracer::memory() {
+    CON(con_fetch, machine->core(), instruction_memory(const machine::Instruction&), instruction_memory(const machine::Instruction&));
+}
+
+void Tracer::writeback() {
+    CON(con_fetch, machine->core(), instruction_writeback(const machine::Instruction&), instruction_writeback(const machine::Instruction&));
 }
 
 void Tracer::reg_pc() {
@@ -48,8 +64,24 @@ void Tracer::reg_hi() {
     r_hi = true;
 }
 
-void Tracer::instruction_fetch(Instruction &inst) {
-    cout << inst.to_str().toStdString() << endl;
+void Tracer::instruction_fetch(const Instruction &inst) {
+    cout << "Fetch: " << inst.to_str().toStdString() << endl;
+}
+
+void Tracer::instruction_decode(const machine::Instruction &inst) {
+    cout << "Decode: " << inst.to_str().toStdString() << endl;
+}
+
+void Tracer::instruction_execute(const machine::Instruction &inst) {
+    cout << "Execute: " << inst.to_str().toStdString() << endl;
+}
+
+void Tracer::instruction_memory(const machine::Instruction &inst) {
+    cout << "Memory: " << inst.to_str().toStdString() << endl;
+}
+
+void Tracer::instruction_writeback(const machine::Instruction &inst) {
+    cout << "Writeback: " << inst.to_str().toStdString() << endl;
 }
 
 void Tracer::regs_pc_update(std::uint32_t val) {
diff --git a/qtmips_cli/tracer.h b/qtmips_cli/tracer.h
index 913687c..53fd3e7 100644
--- a/qtmips_cli/tracer.h
+++ b/qtmips_cli/tracer.h
@@ -9,8 +9,12 @@ class Tracer : public QObject {
 public:
     Tracer(machine::QtMipsMachine *machine);
 
-    // Trace fetched instruction
+    // Trace instructions in different stages/sections
     void fetch();
+    void decode();
+    void execute();
+    void memory();
+    void writeback();
     // Trace registers
     void reg_pc();
     void reg_gp(std::uint8_t i);
@@ -18,8 +22,12 @@ public:
     void reg_hi();
 
 private slots:
-    void instruction_fetch(machine::Instruction &inst);
-    // TODO fetch
+    void instruction_fetch(const machine::Instruction &inst);
+    void instruction_decode(const machine::Instruction &inst);
+    void instruction_execute(const machine::Instruction &inst);
+    void instruction_memory(const machine::Instruction &inst);
+    void instruction_writeback(const machine::Instruction &inst);
+
     void regs_pc_update(std::uint32_t val);
     void regs_gp_update(std::uint8_t i, std::uint32_t val);
     void regs_hi_lo_update(bool hi, std::uint32_t val);
-- 
cgit v1.2.3