From 430615059b6cee248c348f0975f6ee24ef661c02 Mon Sep 17 00:00:00 2001
From: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Date: Fri, 15 Mar 2019 17:14:25 +0100
Subject: Correct commandline tracer connections.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
---
 qtmips_cli/tracer.cpp | 37 ++++++++++++++++++++-----------------
 qtmips_cli/tracer.h   | 10 +++++-----
 2 files changed, 25 insertions(+), 22 deletions(-)

(limited to 'qtmips_cli')

diff --git a/qtmips_cli/tracer.cpp b/qtmips_cli/tracer.cpp
index 3a7a971..d575680 100644
--- a/qtmips_cli/tracer.cpp
+++ b/qtmips_cli/tracer.cpp
@@ -52,31 +52,34 @@ Tracer::Tracer(QtMipsMachine *machine) {
     con_regs_hi_lo = false;
 }
 
-#define CON(VAR, FROM, SIG, SLT) do { \
+#define CON_RAW(VAR, FROM, SIG, SLT) do { \
         if (!VAR) { \
-            connect(FROM, SIGNAL(SIG), this, SLOT(SLT)); \
+            connect(FROM, SIG, this, SLT); \
             VAR = true;\
         }\
     } while(false)
 
+#define CON(VAR, FROM, SIG, SLT) \
+          CON_RAW(VAR, FROM, SIGNAL(SIG), SLOT(SLT))
+
 void Tracer::fetch() {
-    CON(con_fetch, machine->core(), instruction_fetched(const machine::Instruction&), instruction_fetch(const machine::Instruction&));
+    CON_RAW(con_fetch, machine->core(), &Core::instruction_fetched, &Tracer::instruction_fetch);
 }
 
 void Tracer::decode() {
-    CON(con_fetch, machine->core(), instruction_decoded(const machine::Instruction&), instruction_decode(const machine::Instruction&));
+    CON_RAW(con_fetch, machine->core(), &Core::instruction_decoded, &Tracer::instruction_decode);
 }
 
 void Tracer::execute() {
-    CON(con_fetch, machine->core(), instruction_executed(const machine::Instruction&), instruction_execute(const machine::Instruction&));
+    CON_RAW(con_fetch, machine->core(), &Core::instruction_executed, &Tracer::instruction_execute);
 }
 
 void Tracer::memory() {
-    CON(con_fetch, machine->core(), instruction_memory(const machine::Instruction&), instruction_memory(const machine::Instruction&));
+    CON_RAW(con_fetch, machine->core(), &Core::instruction_memory, &Tracer::instruction_memory);
 }
 
 void Tracer::writeback() {
-    CON(con_fetch, machine->core(), instruction_writeback(const machine::Instruction&), instruction_writeback(const machine::Instruction&));
+    CON_RAW(con_fetch, machine->core(), &Core::instruction_writeback, &Tracer::instruction_writeback);
 }
 
 void Tracer::reg_pc() {
@@ -99,24 +102,24 @@ void Tracer::reg_hi() {
     r_hi = true;
 }
 
-void Tracer::instruction_fetch(const Instruction &inst) {
-    cout << "Fetch: " << inst.to_str().toStdString() << endl;
+void Tracer::instruction_fetch(const Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause) {
+    cout << "Fetch: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
 }
 
-void Tracer::instruction_decode(const machine::Instruction &inst) {
-    cout << "Decode: " << inst.to_str().toStdString() << endl;
+void Tracer::instruction_decode(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause) {
+    cout << "Decode: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
 }
 
-void Tracer::instruction_execute(const machine::Instruction &inst) {
-    cout << "Execute: " << inst.to_str().toStdString() << endl;
+void Tracer::instruction_execute(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause) {
+    cout << "Execute: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
 }
 
-void Tracer::instruction_memory(const machine::Instruction &inst) {
-    cout << "Memory: " << inst.to_str().toStdString() << endl;
+void Tracer::instruction_memory(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause) {
+    cout << "Memory: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
 }
 
-void Tracer::instruction_writeback(const machine::Instruction &inst) {
-    cout << "Writeback: " << inst.to_str().toStdString() << endl;
+void Tracer::instruction_writeback(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause) {
+    cout << "Writeback: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
 }
 
 void Tracer::regs_pc_update(std::uint32_t val) {
diff --git a/qtmips_cli/tracer.h b/qtmips_cli/tracer.h
index 562fec6..a389da7 100644
--- a/qtmips_cli/tracer.h
+++ b/qtmips_cli/tracer.h
@@ -57,11 +57,11 @@ public:
     void reg_hi();
 
 private slots:
-    void instruction_fetch(const machine::Instruction &inst);
-    void instruction_decode(const machine::Instruction &inst);
-    void instruction_execute(const machine::Instruction &inst);
-    void instruction_memory(const machine::Instruction &inst);
-    void instruction_writeback(const machine::Instruction &inst);
+    void instruction_fetch(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
+    void instruction_decode(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
+    void instruction_execute(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
+    void instruction_memory(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
+    void instruction_writeback(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
 
     void regs_pc_update(std::uint32_t val);
     void regs_gp_update(std::uint8_t i, std::uint32_t val);
-- 
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