From 22e2fe92f52e68b8951a2dff1a0de9e05ddf9c7f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Karel=20Ko=C4=8D=C3=AD?= Date: Wed, 3 Jan 2018 12:43:17 +0100 Subject: Add trace-feth to qtmips_cli --- qtmips_cli/main.cpp | 3 ++- qtmips_cli/tracer.cpp | 20 ++++++++++++++------ qtmips_cli/tracer.h | 6 +++++- qtmips_machine/core.cpp | 4 ++-- qtmips_machine/core.h | 1 + 5 files changed, 24 insertions(+), 10 deletions(-) diff --git a/qtmips_cli/main.cpp b/qtmips_cli/main.cpp index 2260ea5..4fd6ce5 100644 --- a/qtmips_cli/main.cpp +++ b/qtmips_cli/main.cpp @@ -39,7 +39,8 @@ void configure_machine(QCommandLineParser &p, MachineConfig &cc) { } void configure_tracer(QCommandLineParser &p, Tracer &tr) { - // TODO trace fetched instruction + if (p.isSet("trace-fetch")) + tr.fetch(); if (p.isSet("trace-pc")) tr.reg_pc(); diff --git a/qtmips_cli/tracer.cpp b/qtmips_cli/tracer.cpp index 55dc3e3..ca66e09 100644 --- a/qtmips_cli/tracer.cpp +++ b/qtmips_cli/tracer.cpp @@ -17,33 +17,41 @@ Tracer::Tracer(QtMipsMachine *machine) { con_regs_hi_lo = false; } -#define CON(VAR, SIG, SLT) do { \ +#define CON(VAR, FROM, SIG, SLT) do { \ if (!VAR) { \ - connect(machine->registers(), SIGNAL(SIG), this, SLOT(SLT)); \ + connect(FROM, SIGNAL(SIG), this, SLOT(SLT)); \ VAR = true;\ }\ } while(false) +void Tracer::fetch() { + CON(con_fetch, machine->core(), instruction_fetched(machine::Instruction&), instruction_fetch(machine::Instruction&)); +} + void Tracer::reg_pc() { - CON(con_regs_pc, pc_update(std::uint32_t), regs_pc_update(std::uint32_t)); + CON(con_regs_pc, machine->registers(), pc_update(std::uint32_t), regs_pc_update(std::uint32_t)); } void Tracer::reg_gp(std::uint8_t i) { SANITY_ASSERT(i <= 32, "Trying to trace invalid gp."); - CON(con_regs_gp, gp_update(std::uint8_t,std::uint32_t), regs_gp_update(std::uint8_t,std::uint32_t)); + CON(con_regs_gp, machine->registers(), gp_update(std::uint8_t,std::uint32_t), regs_gp_update(std::uint8_t,std::uint32_t)); gp_regs[i] = true; } void Tracer::reg_lo() { - CON(con_regs_hi_lo, hi_lo_update(bool hi, std::uint32_t val), regs_hi_lo_update(bool hi, std::uint32_t val)); + CON(con_regs_hi_lo, machine->registers(), hi_lo_update(bool hi, std::uint32_t val), regs_hi_lo_update(bool hi, std::uint32_t val)); r_lo = true; } void Tracer::reg_hi() { - CON(con_regs_hi_lo, hi_lo_update(bool hi, std::uint32_t val), regs_hi_lo_update(bool hi, std::uint32_t val)); + CON(con_regs_hi_lo, machine->registers(), hi_lo_update(bool hi, std::uint32_t val), regs_hi_lo_update(bool hi, std::uint32_t val)); r_hi = true; } +void Tracer::instruction_fetch(Instruction &inst) { + cout << inst.to_str().toStdString() << endl; +} + void Tracer::regs_pc_update(std::uint32_t val) { cout << "PC:" << hex << val << endl; } diff --git a/qtmips_cli/tracer.h b/qtmips_cli/tracer.h index 245f418..913687c 100644 --- a/qtmips_cli/tracer.h +++ b/qtmips_cli/tracer.h @@ -9,6 +9,8 @@ class Tracer : public QObject { public: Tracer(machine::QtMipsMachine *machine); + // Trace fetched instruction + void fetch(); // Trace registers void reg_pc(); void reg_gp(std::uint8_t i); @@ -16,6 +18,8 @@ public: void reg_hi(); private slots: + void instruction_fetch(machine::Instruction &inst); + // TODO fetch void regs_pc_update(std::uint32_t val); void regs_gp_update(std::uint8_t i, std::uint32_t val); void regs_hi_lo_update(bool hi, std::uint32_t val); @@ -26,7 +30,7 @@ private: bool gp_regs[32]; bool r_hi, r_lo; - bool con_regs_pc, con_regs_gp, con_regs_hi_lo; + bool con_fetch, con_regs_pc, con_regs_gp, con_regs_hi_lo; }; #endif // TRACER_H diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp index 000d76d..276931c 100644 --- a/qtmips_machine/core.cpp +++ b/qtmips_machine/core.cpp @@ -25,7 +25,7 @@ struct DecodeMap { // This is map from opcode to signals. static const struct DecodeMap dmap[] = { { .flags = DM_SUPPORTED | DM_REGD | DM_REGWRITE, NOALU, NOMEM }, // Alu operations (aluop is decoded from function explicitly) - { .flags = DM_SUPPORTED, NOALU, NOMEM }, // REGIMM (BLTZ, BGEZ, ) + { .flags = DM_SUPPORTED, NOALU, NOMEM }, // REGIMM (BLTZ, BGEZ) { .flags = DM_SUPPORTED, NOALU, NOMEM }, // J NOPE, // JAL { .flags = DM_SUPPORTED, NOALU, NOMEM }, // BEQ @@ -96,8 +96,8 @@ Core::Core(Registers *regs, MemoryAccess *mem) { } struct Core::dtFetch Core::fetch() { - // TODO signals Instruction inst(mem->read_word(regs->read_pc())); + emit instruction_fetched(inst); return { .inst = inst }; diff --git a/qtmips_machine/core.h b/qtmips_machine/core.h index fc61429..b09e297 100644 --- a/qtmips_machine/core.h +++ b/qtmips_machine/core.h @@ -18,6 +18,7 @@ public: virtual void step() = 0; // Do single step signals: + void instruction_fetched(machine::Instruction &inst); protected: Registers *regs; -- cgit v1.2.3