qtmips - MIPS CPU emulator for education purposes

	Commit message (Collapse)	Author	Age
*	Correct memory view updates for uncached and write-through case.	Pavel Pisa	2019-02-03
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Implement BREAK instruction to stop continuous execution.	Pavel Pisa	2019-02-03
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Add cache statistics	Karel Kočí	2018-05-23
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*	Integrate cache with rest of the machine core	Karel Kočí	2018-04-08
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*	Fix Pipelined core not to accept hazard unit configuration	Karel Kočí	2018-01-17
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*	Cleanup some todos in code	Karel Kočí	2018-01-15
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*	Change how we configure cache and configure hazard unit	Karel Kočí	2018-01-15
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*	Add ability to get specific core type from qtmipsmachine	Karel Kočí	2018-01-08
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*	Implement machine restart	Karel Kočí	2018-01-05
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*	Copy machineconfig in QtMipsMachine	Karel Kočí	2018-01-05
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*	Implement some machine execution speed control for gui	Karel Kočí	2018-01-04
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*	Allow delay slot disable for non-pipelined core	Karel Kočí	2018-01-03
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*	Fix how we pass exception	Karel Kočí	2018-01-01
\| \| \| \| \| \|	Previous implementation reseted caught exception to type QtMipsException so we lost possibility to check for object type later on.
*	A lot of small changes in gui	Karel Kočí	2017-12-21
\| \| \| \| \| \|	Added machine status. Widgets now hold size and registers dock has now scrollbars. And more...
*	Put qtmips_machine to machine namespace	Karel Kočí	2017-12-17
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*	Implement few initial graphic elements	Karel Kočí	2017-12-15
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*	Another but same fix for cache	Karel Kočí	2017-12-11
\| \| \| \|	Segfault happening had same cause as previous problem so fix is similar.
*	Another huge pile of work for about two months	Karel Kočí	2017-11-19
\| \| \| \| \| \|	Well I should commit every change instead of this madness. I am not documenting changes as all this is just improvements and implementation progression.
*	Initial commit	Karel Kočí	2017-08-30
	Adding work done so far.