| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | Reorganize PC handling and implement full REGIMM decode. | Pavel Pisa | 2019-02-05 |
| | | | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Correct shift operation and make ALU_OP_MOVZ and ALU_OP_MOVN encoding ↵ | Pavel Pisa | 2019-02-05 |
| | | | | | | | independent. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Make instruction to text conversion more generic. | Pavel Pisa | 2019-02-05 |
| | | | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Rewrite instruction decoding to be generic and mostly architecture independent. | Pavel Pisa | 2019-02-05 |
| | | | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Remove almost all direct access to opcode and function from the core. | Pavel Pisa | 2019-02-04 |
| | | | | | | | | Remaining are MOVZ and MOVN in the execution phase and all branch and jump operations in handle_pc(). Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Take into account actual requirements for rs, rt and rd write for individual ↵ | Pavel Pisa | 2019-02-04 |
| | | | | | | | instructions. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Unified instructions table and access type move to machinedefs.h . | Pavel Pisa | 2019-02-04 |
| | | | | | | | | This allows to specify requirement for RS and RD on instruction basis even for T_R / ALU instructions. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Primitive implementation of cache instruction. | Pavel Pisa | 2019-02-04 |
| | | | | | | | | When any variant of cache instruction is detected flush and invalidate whole data cache. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Add license to the source files. | Pavel Pisa | 2019-02-04 |
| | | | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Implement BREAK instruction to stop continuous execution. | Pavel Pisa | 2019-02-03 |
| | | | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Implement instructions MULT, MULTU, DIV, DIVU. | Pavel Pisa | 2019-02-03 |
| | | | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
| * | Fix some instruction string representation | Karel Kočí | 2018-04-08 |
| | | |||
| * | Change string format for some instruction | Karel Kočí | 2018-04-08 |
| | | | | | This makes our string format closer to original assembler. | ||
| * | Fix forwarding checker for I and J and S* instructions | Karel Kočí | 2018-03-06 |
| | | | | | THere are exceptions when we care about forwarding and when we don't. | ||
| * | Another swap in instruction decoding | Karel Kočí | 2018-02-14 |
| | | |||
| * | Swap rs and rt in I instructons decoding | Karel Kočí | 2018-02-14 |
| | | |||
| * | Various graphics tweaks | Karel Kočí | 2018-01-27 |
| | | |||
| * | Print I instruction immediate field in hexa | Karel Kočí | 2018-01-17 |
| | | |||
| * | Reverse translate NOP correctly | Karel Kočí | 2018-01-15 |
| | | |||
| * | Allow instruction trace from any stage | Karel Kočí | 2018-01-11 |
| | | | | | | | In reality this internally allows us to see stages even it we are not using pipelining but that is hidden from outside simply to not confuse user. | ||
| * | Initial implementation of reverse instruction conversion | Karel Kočí | 2018-01-03 |
| | | | | | | | This is rude implementation. We always print all fields. In future we should add flags to set what fields should be hidden on per instruction bases. | ||
| * | Put qtmips_machine to machine namespace | Karel Kočí | 2017-12-17 |
| | | |||
| * | Revert "Suppress some warning" | Karel Kočí | 2017-12-17 |
| | | | | | This reverts commit 5bf637a429bbcf09092b8d189010c50d61c3562f. | ||
| * | Suppress some warning | Karel Kočí | 2017-12-12 |
| | | | | | | You can call it a fix but in reality it has same effect but I accept that this is better. | ||
| * | Test pipelined core | Karel Kočí | 2017-11-25 |
| | | |||
| * | Implement tests for few more arithmetic instructions | Karel Kočí | 2017-11-21 |
| | | |||
| * | Add possibility to compare memory and registers state | Karel Kočí | 2017-11-21 |
| | | | | | | | For core testing we want to compare whole memory and registers. Registers are pretty simple but in case of memory it is some what more complicated and required its own tests to be sure that it works. | ||
| * | Another huge pile of work for about two months | Karel Kočí | 2017-11-19 |
| | | | | | | | Well I should commit every change instead of this madness. I am not documenting changes as all this is just improvements and implementation progression. | ||
| * | Add some more instructions to be decoded and arithmetic I test | Karel Kočí | 2017-09-05 |
| | | |||
| * | Use QString and QVector instead of std ones and more | Karel Kočí | 2017-09-02 |
| | | |||
| * | Some to_string_hex cleanups | Karel Kočí | 2017-08-30 |
| | | |||
| * | Initial commit | Karel Kočí | 2017-08-30 |
| Adding work done so far. | |||
 |
index : qtmips | |
| MIPS CPU emulator for education purposes | Gitolite user |
| aboutsummaryrefslogtreecommitdiff |