Commit message (Collapse) | Author | Age | ||
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* | Do not replace rt by forward if instruction in T_R or store. | Pavel Pisa | 2019-01-30 | |
| | | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | |||
* | Display execution stage forward signals in the view. | Pavel Pisa | 2019-01-30 | |
| | | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | |||
* | Correct hazards processing. | Pavel Pisa | 2019-01-30 | |
| | | | | | | | | The shorter loop has priority. This is achieved by later processing when it replaces possible result from longer loop over W stage. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | |||
* | Add few more labels | Karel Kočí | 2018-05-24 | |
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* | Add buses statis views | Karel Kočí | 2018-05-24 | |
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* | Fix load and store instructions | Karel Kočí | 2018-05-02 | |
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* | Implement LUI | Karel Kočí | 2018-04-08 | |
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* | Implement sync for memory | Karel Kočí | 2018-04-08 | |
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* | Integrate cache with rest of the machine core | Karel Kočí | 2018-04-08 | |
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* | Fix forwarding checker for I and J and S* instructions | Karel Kočí | 2018-03-06 | |
| | | | | THere are exceptions when we care about forwarding and when we don't. | |||
* | Forward from execute stage to decode stage latch | Karel Kočí | 2018-02-14 | |
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* | Do empty fetch stage to report fetch even if we stall | Karel Kočí | 2018-02-14 | |
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* | Fix signextend in core | Karel Kočí | 2018-02-14 | |
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* | Add instruction view to single core | Karel Kočí | 2018-01-21 | |
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* | Cleanup some todos in code | Karel Kočí | 2018-01-15 | |
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* | Implement hazard unit | Karel Kočí | 2018-01-15 | |
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* | Allow instruction trace from any stage | Karel Kočí | 2018-01-11 | |
| | | | | | | In reality this internally allows us to see stages even it we are not using pipelining but that is hidden from outside simply to not confuse user. | |||
* | Implement machine restart | Karel Kočí | 2018-01-05 | |
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* | Allow delay slot disable for non-pipelined core | Karel Kočí | 2018-01-03 | |
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* | Add trace-feth to qtmips_cli | Karel Kočí | 2018-01-03 | |
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* | Put qtmips_machine to machine namespace | Karel Kočí | 2017-12-17 | |
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* | Implement some store and load instructions | Karel Kočí | 2017-12-12 | |
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* | Fix immediate alu operation | Karel Kočí | 2017-12-12 | |
| | | | | | There should be a sign extension to 32bit when doing immediate operations. | |||
* | Implement branch and jump instructions | Karel Kočí | 2017-12-12 | |
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* | Add crude implementation of MOV* instructions | Karel Kočí | 2017-11-25 | |
| | | | | I don't like how it's implemented but I have no other idea atm. | |||
* | Implement instructions for moving from and to HI and LO registers | Karel Kočí | 2017-11-25 | |
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* | Test pipelined core | Karel Kočí | 2017-11-25 | |
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* | Implement some logical operations | Karel Kočí | 2017-11-21 | |
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* | Implement some immediate arithmetic instructions | Karel Kočí | 2017-11-21 | |
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* | Implement and test ADD | Karel Kočí | 2017-11-21 | |
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* | Another huge pile of work for about two months | Karel Kočí | 2017-11-19 | |
| | | | | | | Well I should commit every change instead of this madness. I am not documenting changes as all this is just improvements and implementation progression. | |||
* | Initial commit | Karel Kočí | 2017-08-30 | |
Adding work done so far. |