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path: root/qtmips_machine/cop0state.cpp
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* Dock to view coprocessor 0 and cop0 counter/comparator support.Pavel Pisa2019-03-05
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Use irq 3 (HW1) for Rx and irq 2 (HW0) for Tx to be compatible with SPIM.Pavel Pisa2019-03-04
| | | | | | | Jump to address 0x8000180 by default and to EBase + 0x180 when EBase is set to be compatible with real MIPS CPU. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implemented interrupt delivery and processing for serial port.Pavel Pisa2019-03-04
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implemented coprocessor 0 registers access and register EPC and Cause set by ↵Pavel Pisa2019-03-04
exception. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>