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* View register numbers in decimal notation.Pavel Pisa2019-02-07
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implemented simple indication of presence of memory location in the cache.Pavel Pisa2019-02-07
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct display of jump and branch instructions.Pavel Pisa2019-02-07
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Add address to emitted instruction to allow its use for branch address decoding.Pavel Pisa2019-02-07
| | | | | | | | The new Qt5 syntax is used to create connections because old syntax does not work with multiple arguments for some unresolved reason. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implemented basic infrastructure to handle exceptions.Pavel Pisa2019-02-07
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Resolve some memory leaks found by Valgrind.Pavel Pisa2019-02-06
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Add license to the source files.Pavel Pisa2019-02-04
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct memory view updates for uncached and write-through case.Pavel Pisa2019-02-03
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implement BREAK instruction to stop continuous execution.Pavel Pisa2019-02-03
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implement realistic hazard resolution for JR, JALR, BEQ, BNE, BLTZ, BGEZ ↵Pavel Pisa2019-02-02
| | | | | | | | | | | instructions. The previous code worked by chance only because decode has been fully processed including forwarding from M and W before PC processing started. But in real hardware the PC processing runs in parallel with ALU and cannot read its results in the same cycle. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Initial support for JAL.Pavel Pisa2019-01-31
| | | | | | | The JR, BEQ, BNE are most probably incorrect still. There is missing forwarding for pipelined execution. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Display rs, rt, rd and write register number in all stages.Pavel Pisa2019-01-31
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Display execution stage forward signals in the view.Pavel Pisa2019-01-30
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Specify rpath during linking to find qtmips_machine library without install.Pavel Pisa2019-01-30
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Hide some values that shouldn't been visible in no pipelined versionKarel Kočí2018-06-20
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* Fix value position for non-pipelined coreKarel Kočí2018-05-24
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* Add few more labelsKarel Kočí2018-05-24
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* Add few additional labelsKarel Kočí2018-05-24
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* Add buses statis viewsKarel Kočí2018-05-24
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* Add cache view rendererKarel Kočí2018-05-23
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* Ignore hazard unit for nowKarel Kočí2018-05-23
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* Add cache statisticsKarel Kočí2018-05-23
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* Initial implementation of cache viewKarel Kočí2018-04-17
| | | | It needs some more work to look nice but it already works.
* Drop unneeded parameter from CoreViewScene constructorKarel Kočí2018-04-17
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* Fix angle scroll speedKarel Kočí2018-04-17
| | | | | I finally manage to make device to report as angle scroll device. And it was too fast scroll so I make it solver. It is now some what acceptable.
* Store memory and program view address positionKarel Kočí2018-04-17
| | | | | | This reloads memoryview with same base address as it was closed with. It somewhat works but with program view it seems to be buggy and shifts stuff down. But let's say that it's good enough for now.
* When changing focus load it back to edit field in memoryviewKarel Kočí2018-04-15
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* Add 2x speedKarel Kočí2018-04-15
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* Disable memory protection configuration fields for nowKarel Kočí2018-04-15
| | | | | Memory protection is not feature that is strictly required. Because of that it's implementation has lower priority.
* Change presetsKarel Kočí2018-04-15
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* Rename CoreView to GraphicsViewKarel Kočí2018-04-15
| | | | | This generalizes CoreView to be used with other parts of the project too.
* Add cache dockKarel Kočí2018-04-15
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* Fix coverview memory cacheKarel Kočí2018-04-15
| | | | Text was always rendered.
* Show cache statistics in Memory block in coreviewKarel Kočí2018-04-15
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* Disable program followKarel Kočí2018-04-14
| | | | | | | | This should be easy enought to program but it requires some deeper changes to memoryview it self (to allows direct address to item mapping). Because of that I am disabling it for now and I will return to this feature in future. For now I am focusing on other more important aspects of qtmips (to make it feature complete not nice to use).
* Wire up missing control connectionsKarel Kočí2018-04-14
| | | | | Now only hazard unit is missing all wires. Anything else is wired up already.
* Drop quick jump buttons from memory viewKarel Kočí2018-04-10
| | | | | They are not implemented and even if they would they usage would be little bit funky as they would jump by internal amount of page memory.
* Don't insert another column when statictable widget is not widerKarel Kočí2018-04-08
| | | | | This makes static table widget to have only one column until it's wider then higher.
* Ensure that set, block and assoc. is in minimum oneKarel Kočí2018-04-08
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* Add associative cacheKarel Kočí2018-04-08
| | | | Not fully tested yet.
* Tweak shortcuts for primary windowKarel Kočí2018-04-07
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* Add control signals for non-pipelined cpuKarel Kočí2018-03-22
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* Implement Cache configurationKarel Kočí2018-03-06
| | | | This commit implements both cache configuration for machine and for gui.
* Another fix for memoryview scrollKarel Kočí2018-02-10
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* Fix widget docking for MemoryViewKarel Kočí2018-02-05
| | | | | For some reason the layout resize resulted to different height then we counted out. So just calculate it on place instead.
* Fix focus to take in account number of columnsKarel Kočí2018-01-27
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* Drop frame from MemoryView completelyKarel Kočí2018-01-27
| | | | For now just drop it because it's broken.
* Fix some uninitialized jumpsKarel Kočí2018-01-27
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* Various graphics tweaksKarel Kočí2018-01-27
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* Jump to pc address when program counter is double clickedKarel Kočí2018-01-25
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