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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Instructions description in instruction.cpp has been
pragmatically augmented by tool based on Python MIPS simulator,
hazards analyzer
https://github.com/ppisa/apo-simarch
That code has been originally distilled from from GNU
binutils sources.
Implementation is now inline with my original proposal
Previous solution gets untenable with more complex
instructions and its complexity would grow extremely.
MIPS instruction set with coprocessor instructions
which use sel field, rd used as index, rt as destination
and other peculiarities in newer versions cannot
be processed based on basic CPU control signals.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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peripherals.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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For now a memory view is missing so there is no content.
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Well I should commit every change instead of this madness. I am not
documenting changes as all this is just improvements and implementation
progression.
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