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* OBS: use appropriate dependencies for Suse.Pavel Pisa2019-03-21
| | | | | | | The Qt5 and libelf development packages differs between Fedora and Suse. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Initial attempt to package QtMips by Open Build Service.Pavel Pisa2019-03-21
| | | | | | | | | | | | | | Build is available at https://build.opensuse.org/package/show/home:ppisa/qtmips Package builds for Fedora_29 already but Suse seems to be excluded for some reasons. The build for debian required qtmips.dsc, debian.changelog, debian.control and debian.rules. The last three are available in archive but OBS does not found them. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Update version to 0.6.6.Pavel Pisa2019-03-17
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Registers and cop0 state updates and reads are visualized by highlights.Pavel Pisa2019-03-17
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Show corresponding memory word address in the cacheview.Pavel Pisa2019-03-17
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Highlight actual word read or written to the cache.Pavel Pisa2019-03-17
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct word in block visualization in cache view.Pavel Pisa2019-03-17
| | | | | | | The word index (column) has been erroneously used for set index value. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct binary release address to point to CVUT archive.Pavel Pisa2019-03-16
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Update readme - include how CACHE and SYNCI instructions are implemented.Pavel Pisa2019-03-16
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Allow tracing of multiple stages in qtmips_cli.Pavel Pisa2019-03-15
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Attempt to make source compatible with older Qt 5 version.Pavel Pisa2019-03-15
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct commandline tracer connections.Pavel Pisa2019-03-15
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Make use of QVERIFY_EXCEPTION_THROWN conditional, it is not available on ↵Pavel Pisa2019-03-15
| | | | | | Ubuntu Trusty. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Include Debian copyright file.Pavel Pisa2019-03-15
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Make lintian happy and update version to 0.6.5 as preparation for 0.7.Pavel Pisa2019-03-15
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Include Debian package build information.Pavel Pisa2019-03-15
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Switch to static libraries by default and ensure application rebuild when a ↵Pavel Pisa2019-03-15
| | | | | | | | | | | | | | | | library changes. I have not found a way how to pass additional CONFIG options to Debian package build (dpkg-buildpackage) when qmake is invoked from debian/rules with debian helper based (dh) build. The way how qmake solves dependencies between program and libraries comes from stone age. It is necessary to include complete path to the library in PRE_TARGETDEPS definition including lib prefix and .a suffix. This is non portable and cannot be easily used when static and dynamic libraries build alternatives are considered. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* More precise program and memory tableviews column width calculation.Pavel Pisa2019-03-15
| | | | | | | This should resolve text elide problem experienced on some combination of desktop/fonts setting. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Fix nested calls of setCurrentIndex which caused breakage.Pavel Pisa2019-03-14
| | | | | | | | | | | | | | | | | ProgramTableView::focus_address() calls QAbstractItemView::setCurrentIndex(). verticalScrollBar() value is updated as result of current row change. This emits signal valueChanged which is connected to ProgramTableView::adjust_scroll_pos(). It checks if the limit of range covered by actual model and row to address offset is reached. If the top or bottom 1/8 of range is reached then model needs to be adjusted to cover continuation area. Model shift requires update of the current row to stay on the same address even that row 0 address offset is changed. This model shifting is required because range of scroll is only signed integer and QTableView is even more limited in row count to work reliably. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Allow byte and half-word access to the peripherals.Pavel Pisa2019-03-13
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Fix LB and LH sign extension and LH/SH mask calculation.Pavel Pisa2019-03-13
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Initial version of subset of SPIM system calls.Pavel Pisa2019-03-12
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct use of uninitialized dt_d.num_rd and delete reported by valgrind.Pavel Pisa2019-03-12
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Include missing target_errno.h.Pavel Pisa2019-03-11
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Add link to open manual page.Pavel Pisa2019-03-10
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct computation of size in mmap2 stub implementation.Pavel Pisa2019-03-10
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Include syscalls support in documentation.Pavel Pisa2019-03-10
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Fix program end by exception if divisor is zero for div instruction.Pavel Pisa2019-03-10
| | | | | | | | | | | | | | | | | | | | Problem reported by Jakub Broz. Correct behaviour according to MIPS Architecture for Programmers Volume II-A: The MIPS32 Instruction Set Manual which describes DIV instruction Format: DIV rs, rt No arithmetic exception occurs under any circumstances. Restrictions: If the divisor in GPR rt is zero, the arithmetic result value is UNPREDICTABLE. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Map host errno errors to the status and target syscall error reporting.Pavel Pisa2019-03-09
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Updated read and write, added open, close, ftruncate syscalls and fs_root ↵Pavel Pisa2019-03-09
| | | | | | | | | | | option. When operating system emulation root directory (fs_root) are selected then open() syscall opens real host system files in this limited subtree. When fs_root is not set then console is mapped to all read, write, open and close calls. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct exception setup - break and HW break should cause stop and step over.Pavel Pisa2019-03-06
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Enable configuration of syscalls emulation and stop on exception.Pavel Pisa2019-03-06
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* README: fix typo in example of cmdJan Kaisrlik2019-03-06
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* README: fix typosJan Kaisrlik2019-03-06
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* Suppress warning where case fall-through is intentional.Pavel Pisa2019-03-06
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct parsing of register + offset operands, i.e., LW and SW.Pavel Pisa2019-03-06
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Include description of partial coprocessor 0 support in README.Pavel Pisa2019-03-05
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Try the strict check of encoded instructions and relax break and other.Pavel Pisa2019-03-05
| | | | | | | Some instructions can have fields to be used by operating system or for error reporting by user. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Complete revamp of disassembler and assembler arguments processing.Pavel Pisa2019-03-05
| | | | | | | | | | | | | | | | | | | | | Instructions description in instruction.cpp has been pragmatically augmented by tool based on Python MIPS simulator, hazards analyzer https://github.com/ppisa/apo-simarch That code has been originally distilled from from GNU binutils sources. Implementation is now inline with my original proposal Previous solution gets untenable with more complex instructions and its complexity would grow extremely. MIPS instruction set with coprocessor instructions which use sel field, rd used as index, rt as destination and other peculiarities in newer versions cannot be processed based on basic CPU control signals. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Dock to view coprocessor 0 and cop0 counter/comparator support.Pavel Pisa2019-03-05
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Use irq 3 (HW1) for Rx and irq 2 (HW0) for Tx to be compatible with SPIM.Pavel Pisa2019-03-04
| | | | | | | Jump to address 0x8000180 by default and to EBase + 0x180 when EBase is set to be compatible with real MIPS CPU. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implemented interrupt delivery and processing for serial port.Pavel Pisa2019-03-04
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implemented coprocessor 0 registers access and register EPC and Cause set by ↵Pavel Pisa2019-03-04
| | | | | | exception. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* build.sh: use -recursive instead of explicit listKarel Kočí2019-03-02
| | | | Signed-off-by: Karel Kočí <cynerd@email.cz>
* Add dependency of qtmips_gui on qtmips_osemu.Pavel Pisa2019-03-02
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Simple serial port receive implementation.Pavel Pisa2019-02-25
| | | | | | | | | Simple polled mode serial port input implemented for serial port peripheral and for read and readv system calls. When end of input character reserve is reached for read/readv, newline is automatically appended. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Exceptions causes align with SPIM and add serial port range alias equivalent ↵Pavel Pisa2019-02-25
| | | | | | to SPIM. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Change serial port peripheral to match SPIM registers definition.Pavel Pisa2019-02-25
| | | | | | | Still Tx only and keep 0xffffc000 base to allows single instruction LW and SW access. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct relative jumps range and adjust it for single core without delay-slot.Pavel Pisa2019-02-24
| | | | | | | | | | | | Setting bits 16 to 31 to 1 is incorrect, offset is shift by two so bit 16 can be zero for jumps in range -64k to -128k. Adjust relative offsets to compute target address same, as if there is delay slot, for CPU variant without delay slot. This allows to use same/standard MIPS assembler for mode without delay slots. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* README - update list of supported instructions.Pavel Pisa2019-02-24
| | | | | | | Complete list from MIPS32 Instruction Set Quick Reference is supported now. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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