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authorKarel Kočí <cynerd@email.cz>2017-11-21 22:01:52 +0100
committerKarel Kočí <cynerd@email.cz>2017-11-21 22:01:52 +0100
commitcd9e572b6523fac483ce1695ae1785fca075cc53 (patch)
tree06fddd51de93b35915e1b6beeecec364be2492b1 /qtmips_machine/tests
parent499a88621d12ff0cdcba1f8c796b7031d6adc649 (diff)
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Implement and test ADD
Diffstat (limited to 'qtmips_machine/tests')
-rw-r--r--qtmips_machine/tests/testcore.cpp10
-rw-r--r--qtmips_machine/tests/testregisters.cpp27
-rw-r--r--qtmips_machine/tests/tst_machine.h1
3 files changed, 33 insertions, 5 deletions
diff --git a/qtmips_machine/tests/testcore.cpp b/qtmips_machine/tests/testcore.cpp
index 33bf07e..5320a6b 100644
--- a/qtmips_machine/tests/testcore.cpp
+++ b/qtmips_machine/tests/testcore.cpp
@@ -5,6 +5,7 @@ void MachineTests::core_regs_data() {
QTest::addColumn<Instruction>("i");
QTest::addColumn<Registers>("init");
QTest::addColumn<Registers>("res");
+ // Note that we shouldn't be touching program counter as that is handled automatically and differs if we use pipelining
// Test arithmetic instructions
{
@@ -21,9 +22,6 @@ void MachineTests::core_regs_data() {
}
void MachineTests::core_regs() {
- QTest::addColumn<Instruction>("i");
- QTest::addColumn<Registers>("init");
- QTest::addColumn<Registers>("res");
QFETCH(Instruction, i);
QFETCH(Registers, init);
QFETCH(Registers, res);
@@ -32,10 +30,12 @@ void MachineTests::core_regs() {
mem.write_word(res.read_pc(), i.data()); // Store single instruction (anything else should be 0 so NOP effectively)
// Test on non-piplined
+ res.pc_inc(); // We did single step so increment program counter accordingly
Memory mem_single(mem); // Create memory copy
- CoreSingle core_single(&init, &mem_single);
+ Registers regs_single(init); // Create registers copy
+ CoreSingle core_single(&regs_single, &mem_single);
core_single.step(); // Single step should be enought as this is risc without pipeline
- //QCOMPARE(init, res); // After doing changes from initial state this should be same state as in case of passed expected result
+ QCOMPARE(regs_single, res); // After doing changes from initial state this should be same state as in case of passed expected result
QCOMPARE(mem, mem_single); // There should be no change in memory
// TODO on pipelined core
diff --git a/qtmips_machine/tests/testregisters.cpp b/qtmips_machine/tests/testregisters.cpp
index 4430beb..b498c11 100644
--- a/qtmips_machine/tests/testregisters.cpp
+++ b/qtmips_machine/tests/testregisters.cpp
@@ -37,3 +37,30 @@ void MachineTests::registers_pc() {
QVERIFY_EXCEPTION_THROWN(r.pc_jmp(0x1), QtMipsExceptionUnalignedJump);
QVERIFY_EXCEPTION_THROWN(r.pc_abs_jmp(0x80020101), QtMipsExceptionUnalignedJump);
}
+
+void MachineTests::registers_compare() {
+ Registers r1, r2;
+ QCOMPARE(r1, r2);
+ // General purpose register
+ r1.write_gp(1, 24);
+ QVERIFY(r1 != r2);
+ r2.write_gp(1, 24);
+ QCOMPARE(r1, r2);
+ // Program counter
+ r1.pc_inc();
+ QVERIFY(r1 != r2);
+ r2.pc_inc();
+ QCOMPARE(r1, r2);
+ // LO/HI (testing just one as they have common codepath)
+ r1.write_hi_lo(false, 18);
+ QVERIFY(r1 != r2);
+ r2.write_hi_lo(false, 18);
+ QCOMPARE(r1, r2);
+ // Now let's try copy (and verify only with gp this time)
+ Registers r3(r1);
+ QCOMPARE(r3, r1);
+ r3.write_gp(12, 19);
+ QVERIFY(r1 != r3);
+ r1.write_gp(12, 19);
+ QCOMPARE(r3, r1);
+}
diff --git a/qtmips_machine/tests/tst_machine.h b/qtmips_machine/tests/tst_machine.h
index b509bed..35104c4 100644
--- a/qtmips_machine/tests/tst_machine.h
+++ b/qtmips_machine/tests/tst_machine.h
@@ -11,6 +11,7 @@ private Q_SLOTS:
void registers_rw_gp();
void registers_rw_hi_lo();
void registers_pc();
+ void registers_compare();
// Memory
void memory();
void memory_data();