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author | Karel Kočí <cynerd@email.cz> | 2017-11-19 21:23:04 +0100 |
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committer | Karel Kočí <cynerd@email.cz> | 2017-11-19 21:23:04 +0100 |
commit | f0ad502e4651243d6a96194b3393bd460c0f7fc9 (patch) | |
tree | 4f912c24b5943bd93b5a3378df75f9611de6779b /qtmips_machine/core.h | |
parent | 2c6562fa78e884d66b8c2a306f020101e8803f2e (diff) | |
download | qtmips-f0ad502e4651243d6a96194b3393bd460c0f7fc9.tar.gz qtmips-f0ad502e4651243d6a96194b3393bd460c0f7fc9.tar.bz2 qtmips-f0ad502e4651243d6a96194b3393bd460c0f7fc9.zip |
Another huge pile of work for about two months
Well I should commit every change instead of this madness. I am not
documenting changes as all this is just improvements and implementation
progression.
Diffstat (limited to 'qtmips_machine/core.h')
-rw-r--r-- | qtmips_machine/core.h | 62 |
1 files changed, 57 insertions, 5 deletions
diff --git a/qtmips_machine/core.h b/qtmips_machine/core.h index 2fd0a40..d4523c3 100644 --- a/qtmips_machine/core.h +++ b/qtmips_machine/core.h @@ -2,20 +2,72 @@ #define CORE_H #include <QObject> -#include "instruction.h" +#include "qtmipsexception.h" #include "registers.h" #include "memory.h" -#include "programloader.h" -#include "programmemory.h" +#include "instruction.h" +#include "alu.h" class Core : public QObject { Q_OBJECT public: - Core(); + Core(Registers *regs, MemoryAccess *mem); + + virtual void step() = 0; // Do single step signals: -public slots: +protected: + Registers *regs; + MemoryAccess *mem; + + struct dtFetch { + Instruction inst; // Loaded instruction + }; + struct dtDecode { + bool mem2reg; // Write memory output to register (instead alu output) + bool memwrite; // If memory should write input + bool alubimm; // If b value to alu is immediate value (rt used otherwise) + bool regd; // If rd is used (otherwise rt is used for write target) + bool regwrite; // If output should be written back to register (which one depends on regd) + bool branch; // If this is branch instruction + enum AluOp aluop; // Decoded ALU operation + std::uint32_t val_rs; // Value from register rs + std::uint32_t val_rt; // Value from register rt + std::uint8_t val_sa; // Value of sa in instruction it self + std::uint16_t val_immediate; // Value of immediate in instruction it self + }; + struct dtExecute { + bool mem2reg; + std::uint32_t val; + // TODO + }; + struct dtMemory { + bool mem2reg; + // TODO + std::uint32_t val; + }; + + struct dtFetch fetch(); + struct dtDecode decode(struct dtFetch); + struct dtExecute execute(struct dtDecode); + struct dtMemory memory(struct dtExecute); + void writeback(struct dtMemory); + +}; + +class CoreSingle : public Core { +public: + CoreSingle(Registers *regs, MemoryAccess *mem); + + void step(); +}; + +class CorePipelined : public Core { +public: + CorePipelined(Registers *regs, MemoryAccess *mem); + + void step(); }; #endif // CORE_H |