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authorKarel Kočí <cynerd@email.cz>2017-11-21 22:01:52 +0100
committerKarel Kočí <cynerd@email.cz>2017-11-21 22:01:52 +0100
commitcd9e572b6523fac483ce1695ae1785fca075cc53 (patch)
tree06fddd51de93b35915e1b6beeecec364be2492b1 /qtmips_machine/core.h
parent499a88621d12ff0cdcba1f8c796b7031d6adc649 (diff)
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Implement and test ADD
Diffstat (limited to 'qtmips_machine/core.h')
-rw-r--r--qtmips_machine/core.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/qtmips_machine/core.h b/qtmips_machine/core.h
index d4523c3..5dd5726 100644
--- a/qtmips_machine/core.h
+++ b/qtmips_machine/core.h
@@ -25,6 +25,7 @@ protected:
Instruction inst; // Loaded instruction
};
struct dtDecode {
+ Instruction inst;
bool mem2reg; // Write memory output to register (instead alu output)
bool memwrite; // If memory should write input
bool alubimm; // If b value to alu is immediate value (rt used otherwise)
@@ -34,18 +35,18 @@ protected:
enum AluOp aluop; // Decoded ALU operation
std::uint32_t val_rs; // Value from register rs
std::uint32_t val_rt; // Value from register rt
- std::uint8_t val_sa; // Value of sa in instruction it self
- std::uint16_t val_immediate; // Value of immediate in instruction it self
};
struct dtExecute {
bool mem2reg;
- std::uint32_t val;
+ std::uint8_t rwrite; // Writeback register (multiplexed between rt and rd according to regd)
+ std::uint32_t alu_val; // Result of ALU execution
// TODO
};
struct dtMemory {
bool mem2reg;
+ std::uint8_t rwrite;
+ std::uint32_t alu_val;
// TODO
- std::uint32_t val;
};
struct dtFetch fetch();