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author | Karel Kočí <cynerd@email.cz> | 2017-11-21 22:01:52 +0100 |
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committer | Karel Kočí <cynerd@email.cz> | 2017-11-21 22:01:52 +0100 |
commit | cd9e572b6523fac483ce1695ae1785fca075cc53 (patch) | |
tree | 06fddd51de93b35915e1b6beeecec364be2492b1 /qtmips_machine/core.cpp | |
parent | 499a88621d12ff0cdcba1f8c796b7031d6adc649 (diff) | |
download | qtmips-cd9e572b6523fac483ce1695ae1785fca075cc53.tar.gz qtmips-cd9e572b6523fac483ce1695ae1785fca075cc53.tar.bz2 qtmips-cd9e572b6523fac483ce1695ae1785fca075cc53.zip |
Implement and test ADD
Diffstat (limited to 'qtmips_machine/core.cpp')
-rw-r--r-- | qtmips_machine/core.cpp | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp index 1edcc97..a7c5d20 100644 --- a/qtmips_machine/core.cpp +++ b/qtmips_machine/core.cpp @@ -11,7 +11,7 @@ // This is map from opcode to signals. static const struct DecodeMap dmap[] = { - { .supported = true, .mem2reg = false, .memwrite = false, .alubimm = false, .regd = false, .regwrite = true, .branch = false }, // Alu operations and more + { .supported = true, .mem2reg = true, .memwrite = false, .alubimm = false, .regd = true, .regwrite = true, .branch = false }, // Alu operations // TODO These are just copies of first one { .supported = true, .mem2reg = false, .memwrite = false, .alubimm = false, .regd = false, .regwrite = false, .branch = true }, // Branch on alu operations { .supported = true, .mem2reg = false, .memwrite = false, .alubimm = false, .regd = true, .regwrite = true, .branch = false }, // J @@ -97,8 +97,17 @@ struct Core::dtDecode Core::decode(struct dtFetch dt) { if (!dec.supported) // TODO message throw QTMIPS_EXCEPTION(UnsupportedInstruction, "", ""); - enum AluOp d_alu = ALU_OP_SLL; // TODO decode for real + + // Prepare alu operation + enum AluOp d_alu; + if (dt.inst.opcode() == 0) { + d_alu = (enum AluOp)dt.inst.funct(); + } else + // TODO can't we ignore this? + d_alu = ALU_OP_SLL; // Just set it to zero so we won't do something stupid like throw exception + return { + .inst = dt.inst, .mem2reg = dec.mem2reg, .memwrite = dec.memwrite, .alubimm = dec.alubimm, @@ -108,17 +117,17 @@ struct Core::dtDecode Core::decode(struct dtFetch dt) { .aluop = d_alu, .val_rs = regs->read_gp(dt.inst.rs()), .val_rt = regs->read_gp(dt.inst.rt()), - .val_sa = dt.inst.shamt(), - .val_immediate = dt.inst.immediate(), }; // TODO on jump there should be delay slot. Does processor addes it or compiler. And do we care? } struct Core::dtExecute Core::execute(struct dtDecode dt) { // TODO signals + return { .mem2reg = dt.mem2reg, - .val = alu_operate(dt.aluop, dt.val_rs, dt.val_rt, dt.val_sa) + .rwrite = dt.regd ? dt.inst.rd() : dt.inst.rt(), + .alu_val = alu_operate(dt.aluop, dt.val_rs, dt.val_rt, dt.inst.shamt()), }; } @@ -126,13 +135,14 @@ struct Core::dtMemory Core::memory(struct dtExecute dt) { // TODO signals return { .mem2reg = dt.mem2reg, - .val = dt.val, + .rwrite = dt.rwrite, + .alu_val = dt.alu_val, }; } void Core::writeback(struct dtMemory dt) { if (dt.mem2reg) { - + regs->write_gp(dt.rwrite, dt.alu_val); } } |