From 462a088c474832b19ff2730de1e6bea66d399c23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Karel=20Ko=C4=8D=C3=AD?= Date: Sat, 15 Oct 2022 23:01:29 +0200 Subject: Add Turris kernel (includes patches from OpenWrt) --- ...program-1ms-autonegotiation-clock-divisor.patch | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 pkgs/patches-linux-5.15/782-v5.17-2-net-mvneta-program-1ms-autonegotiation-clock-divisor.patch (limited to 'pkgs/patches-linux-5.15/782-v5.17-2-net-mvneta-program-1ms-autonegotiation-clock-divisor.patch') diff --git a/pkgs/patches-linux-5.15/782-v5.17-2-net-mvneta-program-1ms-autonegotiation-clock-divisor.patch b/pkgs/patches-linux-5.15/782-v5.17-2-net-mvneta-program-1ms-autonegotiation-clock-divisor.patch new file mode 100644 index 0000000..d9883ca --- /dev/null +++ b/pkgs/patches-linux-5.15/782-v5.17-2-net-mvneta-program-1ms-autonegotiation-clock-divisor.patch @@ -0,0 +1,56 @@ +From 93bb797861804c03e561e72ce419f79933ce8aea Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Tue, 30 Nov 2021 14:54:05 +0000 +Subject: [PATCH 2/2] net: mvneta: program 1ms autonegotiation clock divisor +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Program the 1ms autonegotiation clock divisor according to the clocking +rate of neta - without this, the 1ms clock ticks at about 660us on +Armada 38x configured for 250MHz. Bring this into correct specification. + +Signed-off-by: Russell King +Reviewed-by: Marek Behún +Link: https://lore.kernel.org/r/E1ms4WD-00EKLK-Ld@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/marvell/mvneta.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c +index 191eef5c26a7..380e8791b805 100644 +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -3949,7 +3949,7 @@ static void mvneta_mac_config(struct phylink_config *config, unsigned int mode, + } else if (state->interface == PHY_INTERFACE_MODE_SGMII) { + /* SGMII mode receives the state from the PHY */ + new_ctrl2 |= MVNETA_GMAC2_INBAND_AN_ENABLE; +- new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE; ++ new_clk = MVNETA_GMAC_1MS_CLOCK_ENABLE; + new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN | + MVNETA_GMAC_FORCE_LINK_PASS | + MVNETA_GMAC_CONFIG_MII_SPEED | +@@ -3961,7 +3961,7 @@ static void mvneta_mac_config(struct phylink_config *config, unsigned int mode, + } else { + /* 802.3z negotiation - only 1000base-X */ + new_ctrl0 |= MVNETA_GMAC0_PORT_1000BASE_X; +- new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE; ++ new_clk = MVNETA_GMAC_1MS_CLOCK_ENABLE; + new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN | + MVNETA_GMAC_FORCE_LINK_PASS | + MVNETA_GMAC_CONFIG_MII_SPEED)) | +@@ -3974,6 +3974,10 @@ static void mvneta_mac_config(struct phylink_config *config, unsigned int mode, + new_an |= MVNETA_GMAC_AN_FLOW_CTRL_EN; + } + ++ /* Set the 1ms clock divisor */ ++ if (new_clk == MVNETA_GMAC_1MS_CLOCK_ENABLE) ++ new_clk |= clk_get_rate(pp->clk) / 1000; ++ + /* Armada 370 documentation says we can only change the port mode + * and in-band enable when the link is down, so force it down + * while making these changes. We also do this for GMAC_CTRL2 +-- +2.35.1 + -- cgit v1.2.3