From 462a088c474832b19ff2730de1e6bea66d399c23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Karel=20Ko=C4=8D=C3=AD?= Date: Sat, 15 Oct 2022 23:01:29 +0200 Subject: Add Turris kernel (includes patches from OpenWrt) --- ...k-Add-support-for-PCI-Bridge-Subsystem-Ve.patch | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 pkgs/patches-linux-5.15/0091-PCI-aardvark-Add-support-for-PCI-Bridge-Subsystem-Ve.patch (limited to 'pkgs/patches-linux-5.15/0091-PCI-aardvark-Add-support-for-PCI-Bridge-Subsystem-Ve.patch') diff --git a/pkgs/patches-linux-5.15/0091-PCI-aardvark-Add-support-for-PCI-Bridge-Subsystem-Ve.patch b/pkgs/patches-linux-5.15/0091-PCI-aardvark-Add-support-for-PCI-Bridge-Subsystem-Ve.patch new file mode 100644 index 0000000..b058048 --- /dev/null +++ b/pkgs/patches-linux-5.15/0091-PCI-aardvark-Add-support-for-PCI-Bridge-Subsystem-Ve.patch @@ -0,0 +1,45 @@ +From a6e8a5fd098c65dd8608d21d64df48f5cc7c1957 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 19 Oct 2021 13:54:19 +0200 +Subject: [PATCH 1/9] PCI: aardvark: Add support for PCI Bridge Subsystem + Vendor ID on emulated bridge +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Register with Subsystem Device/Vendor ID is at offset 0x2c. Export is via +emulated bridge. + +After this change Subsystem ID is visible in lspci output at line: + + Capabilities: [40] Subsystem + +Signed-off-by: Pali Rohár +--- + drivers/pci/controller/pci-aardvark.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c +index 4ed1b3ed3d35..8f01bf82a754 100644 +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -32,6 +32,7 @@ + #define PCIE_CORE_DEV_ID_REG 0x0 + #define PCIE_CORE_CMD_STATUS_REG 0x4 + #define PCIE_CORE_DEV_REV_REG 0x8 ++#define PCIE_CORE_SSDEV_ID_REG 0x2c + #define PCIE_CORE_PCIEXP_CAP 0xc0 + #define PCIE_CORE_ERR_CAPCTL_REG 0x118 + #define PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX BIT(5) +@@ -983,6 +984,8 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) + /* Indicates supports for Completion Retry Status */ + bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS); + ++ bridge->subsystem_vendor_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) & 0xffff; ++ bridge->subsystem_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) >> 16; + bridge->has_pcie = true; + bridge->pcie_start = PCIE_CORE_PCIEXP_CAP; + bridge->data = pcie; +-- +2.34.1 + -- cgit v1.2.3