diff options
Diffstat (limited to 'nixos/modules/kernel-patches/0007-PCI-mvebu-Fix-endianity-when-accessing-pci-emul-brid.patch')
| -rw-r--r-- | nixos/modules/kernel-patches/0007-PCI-mvebu-Fix-endianity-when-accessing-pci-emul-brid.patch | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/nixos/modules/kernel-patches/0007-PCI-mvebu-Fix-endianity-when-accessing-pci-emul-brid.patch b/nixos/modules/kernel-patches/0007-PCI-mvebu-Fix-endianity-when-accessing-pci-emul-brid.patch deleted file mode 100644 index 566c793..0000000 --- a/nixos/modules/kernel-patches/0007-PCI-mvebu-Fix-endianity-when-accessing-pci-emul-brid.patch +++ /dev/null @@ -1,68 +0,0 @@ -From b788cf679463d8805bee225400edbd09b7d6bd0e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> -Date: Fri, 12 Aug 2022 11:09:11 +0200 -Subject: [PATCH 07/96] PCI: mvebu: Fix endianity when accessing pci emul - bridge members -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -PCI emul bridge members iolimitupper, iobaseupper, memlimit and membase are -of type __le16, so correctly access these members via le16_to_cpu() macros. - -Fixes: 4ded69473adb ("PCI: mvebu: Propagate errors when updating PCI_IO_BASE and PCI_MEM_BASE registers") -Reported-by: kernel test robot <lkp@intel.com> -Signed-off-by: Pali Rohár <pali@kernel.org> ---- - drivers/pci/controller/pci-mvebu.c | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - -diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c -index 159167ebb2de..cacc78863915 100644 ---- a/drivers/pci/controller/pci-mvebu.c -+++ b/drivers/pci/controller/pci-mvebu.c -@@ -523,7 +523,7 @@ static int mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port) - - /* Are the new iobase/iolimit values invalid? */ - if (conf->iolimit < conf->iobase || -- conf->iolimitupper < conf->iobaseupper) -+ le16_to_cpu(conf->iolimitupper) < le16_to_cpu(conf->iobaseupper)) - return mvebu_pcie_set_window(port, port->io_target, port->io_attr, - &desired, &port->iowin); - -@@ -535,10 +535,10 @@ static int mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port) - * is the CPU address. - */ - desired.remap = ((conf->iobase & 0xF0) << 8) | -- (conf->iobaseupper << 16); -+ (le16_to_cpu(conf->iobaseupper) << 16); - desired.base = port->pcie->io.start + desired.remap; - desired.size = ((0xFFF | ((conf->iolimit & 0xF0) << 8) | -- (conf->iolimitupper << 16)) - -+ (le16_to_cpu(conf->iolimitupper) << 16)) - - desired.remap) + - 1; - -@@ -552,7 +552,7 @@ static int mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) - struct pci_bridge_emul_conf *conf = &port->bridge.conf; - - /* Are the new membase/memlimit values invalid? */ -- if (conf->memlimit < conf->membase) -+ if (le16_to_cpu(conf->memlimit) < le16_to_cpu(conf->membase)) - return mvebu_pcie_set_window(port, port->mem_target, port->mem_attr, - &desired, &port->memwin); - -@@ -562,8 +562,8 @@ static int mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) - * window to setup, according to the PCI-to-PCI bridge - * specifications. - */ -- desired.base = ((conf->membase & 0xFFF0) << 16); -- desired.size = (((conf->memlimit & 0xFFF0) << 16) | 0xFFFFF) - -+ desired.base = ((le16_to_cpu(conf->membase) & 0xFFF0) << 16); -+ desired.size = (((le16_to_cpu(conf->memlimit) & 0xFFF0) << 16) | 0xFFFFF) - - desired.base + 1; - - return mvebu_pcie_set_window(port, port->mem_target, port->mem_attr, &desired, --- -2.37.2 - |