From a5bb06281011f4f0edd6f7b9331f149bd256d495 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Karel=20Ko=C4=8D=C3=AD?= Date: Sun, 22 Mar 2015 14:05:00 +0100 Subject: SPI moved from src subfolder and mode changes SPI USI should now work. SPI USI is now documented. Removing architecture specific folders in src. --- src/avr25/spi_usi.c | 56 ----------------------------------------------------- src/avr5/spi.c | 47 -------------------------------------------- src/spi.c | 47 ++++++++++++++++++++++++++++++++++++++++++++ src/spi_usart.c | 14 ++++++++++++++ src/spi_usi.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 115 insertions(+), 103 deletions(-) delete mode 100644 src/avr25/spi_usi.c delete mode 100644 src/avr5/spi.c create mode 100644 src/spi.c create mode 100644 src/spi_usart.c create mode 100644 src/spi_usi.c (limited to 'src') diff --git a/src/avr25/spi_usi.c b/src/avr25/spi_usi.c deleted file mode 100644 index e63721a..0000000 --- a/src/avr25/spi_usi.c +++ /dev/null @@ -1,56 +0,0 @@ -#include "../../spi_usi.h" - -#if __AVR_ARCH__ == 25 - -#ifdef IOE_SPI_USI_MASTER - -// TODO counter settings with interups -inline void ioe_spi_usi_init(void) { - USI_DIR_REG |= _BV(USI_USCK_PIN) | _BV(USI_DO_PIN); - USI_OUT_REG |= _BV(USI_DI_PIN); - - USICR |= _BV(USIWM0) | _BV(USICS1) | _BV(USICLK); -} - -inline int8_t ioe_spi_usi_transfer(int8_t d) { - USISR |= _BV(USIOIF); - USIDR = d; - do { - USICR |= _BV(USITC); - } while (!(USISR & _BV(USIOIF))); - return USIDR; -} - -#else /* IOE_SPI_USI_MASTER */ - -inline void ioe_spi_usi_init(void) { - USI_DIR_REG |= _BV(USI_DO_PIN); - USI_OUT_REG |= _BV(USI_USCK_PIN) | _BV(USI_DI_PIN); - - USICR |= _BV(USIWM0) | _BV(USICS1) | _BV(USIOIE); -} - -inline void ioe_spi_usi_expose(int8_t data) { - USIDR = data; -} - -inline void ioe_spi_usi_expect(void) { - USISR |= _BV(USIOIF); -} - -inline int ioe_spi_usi_busy(void) { - return USISR & 0x0F; -} - -inline void ioe_spi_usi_join(void) { - while (ioe_spi_usi_busy()) { - } -} - -SIGNAL(USI_OVF_vect) { - ioe_spi_usi_retrieve(USIDR); -} - -#endif /* IOE_SPI_USI_MASTER */ - -#endif /* __AVR_ARCH__ == 25 */ diff --git a/src/avr5/spi.c b/src/avr5/spi.c deleted file mode 100644 index bc026ef..0000000 --- a/src/avr5/spi.c +++ /dev/null @@ -1,47 +0,0 @@ -#include "../../spi.h" - -#if __AVR_ARCH__ == 5 - -inline void ioe_spi_join(void) { - // TODO -} - -#ifdef IOE_SPI_MASTER -inline void ioe_spi_init(void) { - // Set MOSI and SCK output, all other input - DDR_SPI = _BV(DD_MOSI) | _BV(DD_SCLK); - // Enable interrupt - SPCR |= _BV(SPIE); - // Enable SPI master and set clock rate fck/16 - SPCR = _BV(SPE) | _BV(MSTR) | _BV(SPR0); -} - -inline int ioe_spi_ready(void) { - // TODO -} - -inline void ioe_spi_transfer(int8_t data) { - SPDR = data; -} - -#else /* IOE_SPI_MASTER */ -inline void ioe_spi_init(void) { - // Set MISO as output, all other input - DDR_SPI = _BV(DD_MISO); - // Enable interrupt - SPCR |= _BV(SPIE); - // Enable SPI - SPCR = _BV(SPE); -} - -inline void ioe_spi_expose(int8_t data) { - SPDR = data; -} - -#endif /* IOE_SPI_MASTER */ - -SIGNAL(SPI_STC_vect) { - ioe_spi_retrieve(SPDR); -} - -#endif /* __AVR_ARCH__ == 5 */ diff --git a/src/spi.c b/src/spi.c new file mode 100644 index 0000000..8462905 --- /dev/null +++ b/src/spi.c @@ -0,0 +1,47 @@ +#include "../spi.h" +#include "mcu/mcu.h" + +inline void ioe_spi_join(void) { + // TODO +} + +inline int ioe_spi_bussy(void) { +} + +#ifdef IOE_SPI_MASTER +inline void ioe_spi_init(void) { + // Set MOSI and SCK output + DDR_SPI |= _BV(DD_MOSI) | _BV(DD_SCLK); + // Set MISO pull up resistor + PORT_SPI |= _BV(PORT_MISO); + // Enable SPI interrupt + SPCR |= _BV(SPIE); + // Enable SPI master and set clock rate fck/16 + SPCR = _BV(SPE) | _BV(MSTR) | _BV(SPR0); +} + +inline void ioe_spi_transfer(int8_t data) { + SPDR = data; +} + +#else /* IOE_SPI_MASTER */ +inline void ioe_spi_init(void) { + // Set MISO as output + DDR_SPI = _BV(DD_MISO); + // Set SCLK and MOSI pull up resistor + PORT_SPI |= _BV(PORT_SCLK) | _BV(PORT_MOSI); + // Enable SPI interrupt + SPCR |= _BV(SPIE); + // Enable SPI + SPCR = _BV(SPE); +} + +inline void ioe_spi_expose(int8_t data) { + SPDR = data; +} + +#endif /* IOE_SPI_MASTER */ + +SIGNAL(SPI_STC_vect) { + ioe_spi_retrieve(SPDR); +} diff --git a/src/spi_usart.c b/src/spi_usart.c new file mode 100644 index 0000000..40eb06d --- /dev/null +++ b/src/spi_usart.c @@ -0,0 +1,14 @@ +#include "../spi_usart.h" +#include "mcu/mcu.h" + +inline void ioe_spi_usart_init(void) { +} + +inline int8_t ioe_spi_usart_transfer(int8_t d) { +} + +inline int ioe_spi_usart_bussy(void) { +} + +inline void ioe_spi_usart_join(void) { +} diff --git a/src/spi_usi.c b/src/spi_usi.c new file mode 100644 index 0000000..7bdb5c2 --- /dev/null +++ b/src/spi_usi.c @@ -0,0 +1,54 @@ +#include "../spi_usi.h" +#include "../mcu/mcu.h" + +#ifdef IOE_SPI_USI_MASTER + +// TODO counter settings with interups +inline void ioe_spi_usi_init(void) { + // Set USCK and DO as output + DDR_USI |= _BV(DD_USCK) | _BV(DD_DO); + // Set DI pull up resistor + PORT_USI |= _BV(PORT_DI); + + USICR |= _BV(USIWM0) | _BV(USICS1) | _BV(USICLK); +} + +inline int8_t ioe_spi_usi_transfer(int8_t d) { + USISR |= _BV(USIOIF); + USIDR = d; + do { + USICR |= _BV(USITC); + } while (!(USISR & _BV(USIOIF))); + return USIDR; +} + +#else /* IOE_SPI_USI_MASTER */ + +inline void ioe_spi_usi_init(void) { + // Set DO as output + DDR_USI |= _BV(DD_DO); + // Set USCK and DI pull up resistor + PORT_USI |= _BV(PORT_USCK) | _BV(PORT_DI); + + USICR |= _BV(USIWM0) | _BV(USICS1) | _BV(USIOIE); +} + +inline void ioe_spi_usi_expose(int8_t data) { + USIDR = data; +} + +inline uint8_t ioe_spi_usi_busy(void) { + return USISR & 0x0F; +} + +inline void ioe_spi_usi_join(void) { + while (ioe_spi_usi_busy()) { + } +} + +SIGNAL(USI_OVF_vect) { + ioe_spi_usi_retrieve(USIDR); + USISR |= _BV(USIOIF); +} + +#endif /* IOE_SPI_USI_MASTER */ -- cgit v1.2.3