From dfc471c4f68eba0c054e61dbb3567ee89e3a036f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Karel=20Ko=C4=8D=C3=AD?= Date: Thu, 9 Mar 2017 07:04:55 +0100 Subject: Update spiblink example to use examples.mk --- include/ioport.h | 2 +- include/spi.h | 55 ++++++++++++++++++++++++++----------------------------- 2 files changed, 27 insertions(+), 30 deletions(-) (limited to 'include') diff --git a/include/ioport.h b/include/ioport.h index 95b6205..1b6f806 100644 --- a/include/ioport.h +++ b/include/ioport.h @@ -30,7 +30,7 @@ static inline void io_set(uint8_t group, uint8_t mask, int8_t val) { } static inline void io_setin(uint8_t group, uint8_t mask, - enum ioInResistor resistor) { + enum ioInResistor resistor) { IO_DDR(group) &= ~mask; if (resistor == IO_PULLUP) IO_PORT(group) |= mask; diff --git a/include/spi.h b/include/spi.h index c4c003b..68b90ce 100644 --- a/include/spi.h +++ b/include/spi.h @@ -1,63 +1,60 @@ -// vim:ts=4:sw=4:sts=4:expandtab #include #include #include #include "mcu/mcu_def.h" -#include "tasks.h" #ifndef _IOE_SPI_H_ #define _IOE_SPI_H_ #ifdef CONFIG_SPI enum spiMode { - SPI_MODE_MASTER, - SPI_MODE_SLAVE + SPI_MODE_MASTER, + SPI_MODE_SLAVE }; volatile extern int8_t _spi_busy; -volatile extern Mutex spi_mutex; static inline void spi_init(enum spiMode mode) { - _spi_busy = 0; - if (mode == SPI_MODE_MASTER) { - // Set MOSI and SCK output - DDR_SPI |= _BV(DD_MOSI) | _BV(DD_SCLK); - // Set MISO pull up resistor - PORT_SPI |= _BV(PORT_MISO); - // Enable SPI master, set clock rate fck/16 and enable SPI interrupt - SPCR = _BV(SPE) | _BV(SPIE) | _BV(MSTR) | _BV(SPR0); - } else { - // Set MISO as output - DDR_SPI |= _BV(DD_MISO); - // Set SCLK and MOSI pull up resistor - PORT_SPI |= _BV(PORT_SCLK) | _BV(PORT_MOSI); - // Enable SPI and interrupt - SPCR = _BV(SPE) | _BV(SPIE); - } + _spi_busy = 0; + if (mode == SPI_MODE_MASTER) { + // Set MOSI and SCK output + DDR_SPI |= _BV(DD_MOSI) | _BV(DD_SCLK); + // Set MISO pull up resistor + PORT_SPI |= _BV(PORT_MISO); + // Enable SPI master, set clock rate fck/16 and enable SPI interrupt + SPCR = _BV(SPE) | _BV(SPIE) | _BV(MSTR) | _BV(SPR0); + } else { + // Set MISO as output + DDR_SPI |= _BV(DD_MISO); + // Set SCLK and MOSI pull up resistor + PORT_SPI |= _BV(PORT_SCLK) | _BV(PORT_MOSI); + // Enable SPI and interrupt + SPCR = _BV(SPE) | _BV(SPIE); + } } static inline int8_t spi_busy(void) { - return _spi_busy; + return _spi_busy; } static inline void spi_join(void) { - task_delay_till(&_spi_busy, 0); + while(!_spi_busy) ; } static inline void spi_transfer(uint8_t data) { - _spi_busy = 1; - SPDR = data; + _spi_busy = 1; + SPDR = data; } static inline uint8_t spi_send(uint8_t data) { - spi_transfer(data); - task_delay_till(&_spi_busy, 0); - return SPDR; + spi_transfer(data); + spi_join(); + return SPDR; } static inline void spi_expose(uint8_t data) { - SPDR = data; + SPDR = data; } extern void (*spi_receive)(uint8_t data); -- cgit v1.2.3