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author | Karel Kočí <cynerd@email.cz> | 2015-10-17 15:40:51 +0200 |
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committer | Karel Kočí <cynerd@email.cz> | 2015-10-17 15:40:51 +0200 |
commit | b0d8f22f3492fbb3f6dc0e8026e63c803af59007 (patch) | |
tree | eb9707612e87856962474885f2a18ae1621d214e /src | |
parent | 8fa9db4244f4ee33aa47561c569edfa62fe37928 (diff) | |
download | avr-ioe-b0d8f22f3492fbb3f6dc0e8026e63c803af59007.tar.gz avr-ioe-b0d8f22f3492fbb3f6dc0e8026e63c803af59007.tar.bz2 avr-ioe-b0d8f22f3492fbb3f6dc0e8026e63c803af59007.zip |
Complete commit of current work
Diffstat (limited to 'src')
-rw-r--r-- | src/can_mcp2515.c | 0 | ||||
-rw-r--r-- | src/pcint.c | 32 | ||||
-rw-r--r-- | src/sensor_dht22.c | 116 | ||||
-rw-r--r-- | src/spi.c | 59 | ||||
-rw-r--r-- | src/tasks.c | 17 | ||||
-rw-r--r-- | src/timer.c | 26 | ||||
-rw-r--r-- | src/twi.c | 0 | ||||
-rw-r--r-- | src/usart.c | 53 | ||||
-rw-r--r-- | src/usi_spi.c | 54 |
9 files changed, 279 insertions, 78 deletions
diff --git a/src/can_mcp2515.c b/src/can_mcp2515.c new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/can_mcp2515.c diff --git a/src/pcint.c b/src/pcint.c new file mode 100644 index 0000000..1dedb63 --- /dev/null +++ b/src/pcint.c @@ -0,0 +1,32 @@ +/* This file defines and handles Pin change interupts. + * This interupt can be used in different modules and sensors. Function call can + * be done from this interrupt handdler. + */ +#include <avr/interrupt.h> + +#if (defined CONFIG_IOE_SENSOR_DHT22) + +#ifdef CONFIG_IOE_SENSOR_DHT22 +extern void dht22_read_pcint(void); +#endif + + +ISR(PCINT0_vect, ISR_BLOCK) { +#ifdef CONFIG_IOE_SENSOR_DHT22 + void dht22_read_pcint(); +#endif +} + +ISR(PCINT1_vect, ISR_BLOCK) { +#ifdef CONFIG_IOE_SENSOR_DHT22 + void dht22_read_pcint(); +#endif +} + +ISR(PCINT2_vect, ISR_BLOCK) { +#ifdef CONFIG_IOE_SENSOR_DHT22 + void dht22_read_pcint(); +#endif +} + +#endif diff --git a/src/sensor_dht22.c b/src/sensor_dht22.c new file mode 100644 index 0000000..0ae7c01 --- /dev/null +++ b/src/sensor_dht22.c @@ -0,0 +1,116 @@ +#include "../sensor_dht22.h" + +#ifdef CONFIG_IOE_SENSOR_DHT22 + +#define PP dht22_ports[pi] +#define PPP dht22_ports[dht22_measurement.pi] + +#define TIMEOUT F_CPU/40000 + +#define STATUS_NONE 0 +#define STATUS_COMPLETE 1 +#define STATUS_TIMEOUT 2 + +#define PORT_SENSORW 4 +#define PORT_SENSORRESP_L 3 +#define PORT_SENSORRESP_H 2 +#define PORT_H 1 +#define PORT_L 0 + +struct { + uint8_t index; + uint8_t data[5]; + volatile uint8_t status; + uint8_t pi; + uint8_t port_status; +} dht22_measurement; + +inline void dht22_init(uint8_t pi) { + // Set port as output and set level hight + *(PP.DDR) |= PP.MASK; + *(PP.PORT) |= PP.MASK; + // Enable all pin change interrupts + PCIFR = 0xff; +} + + +inline void dht22_read_deac(uint8_t status) { + dht22_measurement.status = status; + // Disable pin change interrupt + *(PPP.PCMSK) &= ~PPP.PCMSK_MASK; + timer_disable(CONFIG_IOE_SENSOR_DHT22_TIMER); +} + +// This is called from pcint.c +void dht22_read_pcint(void) { + switch (dht22_measurement.port_status) { + case PORT_L: + if (!(*(PPP.PIN) & PPP.MASK)) + return; + dht22_measurement.port_status = PORT_H; + break; + case PORT_H: + if (*(PPP.PIN) & PPP.MASK) + return; + dht22_measurement.port_status = PORT_L; + register uint16_t val; + val = timer_value(CONFIG_IOE_SENSOR_DHT22_TIMER); + // TODO compare value + if (val < 1) { + dht22_measurement.data[dht22_measurement.index / 8] + } + if (++(dht22_measurement.index) == 40) { + dht22_read_deac(STATUS_COMPLETE); + return; + } + break; + default: + if (((*(PPP.PIN) & PPP.MASK) && dht22_measurement.port_status == 3) || + !(*(PPP.PIN & PPP.MASK))) + return; + dht22_measurement.port_status--; + } + timer_reset(CONFIG_IOE_SENSOR_DHT22_TIMER); +} + +void dht22_read_timer_overflow(void) { + dht22_read_deac(STATUS_TIMEOUT); +} + +int8_t dht22_read(uint8_t pi, struct dht22_value *rh, + struct dht22_value *t) { + dht22_measurement.index = 0; + dht22_measurement.status = STATUS_NONE; + dht22_measurement.pi = pi; + dht22_measurement.port_status = PORT_SENSORW; + + // Pull port down for 500us + *(PP.PORT) &= ~PP.MASK; + _delay_us(500); + // Initialize timer + timer_init(CONFIG_IOE_SENSOR_DHT22_TIMER, TIMER_DIVIDER_64); + timer_sethook(CONFIG_IOE_SENSOR_DHT22_TIMER, dht22_read_timer_overflow); + // Set pin change interrupt + *(PP.PCMSK) |= PP.PCMSK_MASK; + // Set port as output and pull-up resistor + *(PP.DDR) &= ~PP.MASK; + *(PP.PORT) |= PP.MASK; + // Delay till reading is done + taskDelayTill(&(dht22_measurement.status)); + + // Copy data + rh->integral = dht22_measurement.data[0]; + rh->decimal = dht22_measurement.data[1]; + t->integral = dht22_measurement.data[2]; + t->decimal = dht22_measurement.data[3]; + // Check sum + uint8_t sum = dht22_measurement.data[0]; + sum += dht22_measurement.data[1]; + sum += dht22_measurement.data[2]; + sum += dht22_measurement.data[3]; + if (sum != dht22_measurement.data[4]) + return 1; + return dht22_measurement.status - 1; +} + +#endif /* CONFIG_IOE_SENSOR_SHT22 */ @@ -1,54 +1,23 @@ -#include "../spi.h" +#ifdef CONFIG_IOE_SPI +#ifdef MCUSUPPORT_USART volatile int8_t _spi_busy; -inline void spi_init(enum spiMode mode) { - _spi_busy = 0; - if (mode == SPI_MODE_MASTER) { - // Set MOSI and SCK output - DDR_SPI |= _BV(DD_MOSI) | _BV(DD_SCLK); - // Set MISO pull up resistor - PORT_SPI |= _BV(PORT_MISO); - // Enable SPI master, set clock rate fck/16 and enable SPI interrupt - SPCR = _BV(SPE) | _BV(SPIE) | _BV(MSTR) | _BV(SPR0); - } else { - // Set MISO as output - DDR_SPI |= _BV(DD_MISO); - // Set SCLK and MOSI pull up resistor - PORT_SPI |= _BV(PORT_SCLK) | _BV(PORT_MOSI); - // Enable SPI and interrupt - SPCR = _BV(SPE) | _BV(SPIE); - } -} - -inline int8_t spi_busy(void) { - return _spi_busy; -} - -inline void spi_join(void) { - while (spi_busy()); -} - -inline uint8_t spi_send(uint8_t data) { - spi_transfer(data); - while (spi_busy()); - return SPDR; -} - -inline void spi_transfer(uint8_t data) { - _spi_busy = 1; - SPDR = data; -} - -inline void spi_expose(uint8_t data) { - SPDR = data; -} - ////// Interrupts //////////////////////////////// -void (*spi_receive)(uint8_t data) = 0; +void (*spi_receive) (uint8_t data) = 0; + +#ifdef CONFIG_IOE_CAN_MCP2515 +extern void can_mcp2515_spi_hook(uint8_t); +#endif /* CONFIG_IOE_CAN_MCP2515 */ -SIGNAL(SPI_STC_vect) { +ISR(SPI_STC_vect, ISR_BLOCK) { _spi_busy = 0; +#ifdef CONFIG_IOE_CAN_MCP2515 + can_mcp2515_spi_hook(SPDR); +#endif /* CONFIG_IOE_CAN_MCP2515 */ if (spi_receive) spi_receive(SPDR); } + +#endif /* MCUSUPPORT_SPI */ +#endif /* CONFIG_IOE_SPI */ diff --git a/src/tasks.c b/src/tasks.c new file mode 100644 index 0000000..1d94eaa --- /dev/null +++ b/src/tasks.c @@ -0,0 +1,17 @@ +#include "../tasks.h" + +#ifdef CONFIG_IOE_TASKS + +#else /* CONFIG_IOE_TASKS */ + +int8_t taskDelayTillT(int8_t *condition, uint8_t timeout_10us) { + while(*condition == 0) { + if (timeout_10us == 0) + return 1; + timeout_10us--; + _delay_us(10); + } + return 0; +} + +#endif /* CONFIG_IOE_TASKS */ diff --git a/src/timer.c b/src/timer.c new file mode 100644 index 0000000..68c6c06 --- /dev/null +++ b/src/timer.c @@ -0,0 +1,26 @@ +#include "../timer.h" + +#ifdef CONFIG_IOE_TIMERS + +#ifdef COUNTER0_PWM +ISR(TIMER0_OVF_vect, ISR_BLOCK) { + if (timer_0_pwm_overflow) + timer_0_pwm_overflow(); +} +#endif /* COUNTER0_PWM */ + +#ifdef COUNTER0_PWM +ISR(TIMER1_OVF_vect, ISR_BLOCK) { + if (timer_1_16pwm_overflow) + timer_1_16pwm_overflow(); +} +#endif /* COUNTER0_PWM */ + +#ifdef COUNTER0_PWM +ISR(TIMER2_OVF_vect, ISR_BLOCK) { + if (timer_2_pwm_overflow) + timer_2_pwm_overflow(); +} +#endif /* COUNTER0_PWM */ + +#endif /* CONFIG_IOE_TIMERS */ diff --git a/src/twi.c b/src/twi.c new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/twi.c diff --git a/src/usart.c b/src/usart.c index 5dd14b3..bba83ac 100644 --- a/src/usart.c +++ b/src/usart.c @@ -1,5 +1,6 @@ #include "../usart.h" +#ifdef CONFIG_IOE_USART #ifdef MCUSUPPORT_USART #define USART_PARITY_NONE 0 @@ -10,7 +11,7 @@ #define USART_STOPBIT_DOUBLE 2 #ifndef CONFIG_IOE_USART_BAUD -#warning "CONFIG_IOE_USART_BAUNDRATE not defined. Setting default 9600." +#warning "CONFIG_IOE_USART_BAUD not defined. Setting default 9600." #define CONFIG_IOE_USART_BAUD 9600 #endif #ifndef CONFIG_IOE_USART_PARITY @@ -67,33 +68,26 @@ void usart_init_async(void) { UCSR0A &= ~_BV(U2X0); #endif -#if CONFIG_IOE_USART_PARITY == USART_PARITY_NONE - UCSR0C &= ~(_BV(UPM00) | _BV(UPM01)); -#elif CONFIG_IOE_USART_PARITY == USART_PARITY_ODD - UCSR0C &= ~_BV(UPM00); - UCSR0C |= _BV(UPM01); -#else // USART_PARITY_EVEN - UCSR0C |= _BV(UPM00) | _BV(UPM01); + UCSR0C = 0 | +// USART_PARITY_NONE are both UMP01 and UMP00 zero +#if CONFIG_IOE_USART_PARITY == USART_PARITY_ODD + _BV(UPM01) | +#elif CONFIG_IOE_USART_PARITY == USART_PARITY_EVEN + _BV(UPM00) | _BV(UPM01) | #endif - -#if CONFIG_IOE_USART_STOPBIT == USART_STOPBIT_SINGLE - UCSR0C &= ~_BV(USBS0); -#else - UCSR0C |= _BV(USBS0); +// USART_STOPBIT_SINGLE is USBS0 zero +#if CONFIG_IOE_USART_STOPBIT == USART_STOPBIT_DOUBLE + _BV(USBS0) | #endif - -#if CONFIG_IOE_USART_DATABITS == 5 - UCSR0C &= ~(_BV(UCSZ00) | _BV(UCSZ01)); -#elif CONFIG_IOE_USART_DATABITS == 6 - UCSR0C &= ~_BV(UCSZ01); - UCSR0C |= _BV(UCSZ00); +// For 5 databits are UCSZ00 and UCSZ01 zero +#if CONFIG_IOE_USART_DATABITS == 6 + _BV(UCSZ00) #elif CONFIG_IOE_USART_DATABITS == 7 - UCSR0C &= ~_BV(UCSZ00); - UCSR0C |= _BV(UCSZ01); + _BV(UCSZ01) #elif CONFIG_IOE_USART_DATABITS == 8 - UCSR0C |= _BV(UCSZ00) | _BV(UCSZ01); + _BV(UCSZ00) | _BV(UCSZ01) #endif - + ; // Enable receiver, transmitter and RX complete, // Data register empty interrupts UCSR0B = _BV(RXEN0) | _BV(TXEN0) | _BV(RXCIE0) | _BV(UDRIE0); @@ -122,7 +116,7 @@ inline void usart_send(uint8_t data) { } #ifdef _IOE_USART_OUTBUFFER -void usart_send_str(char *str) { +inline void usart_send_str(char *str) { while (*str != '\0') { usart_send((uint8_t) * str); str++; @@ -139,14 +133,6 @@ uint8_t usart_get(void) { } #endif -inline uint8_t usart_queryerror(void) { - return UCSR0A & (_BV(FE0) | _BV(DOR0) | _BV(UPE0)); -} - -inline int8_t usart_busy(void) { - return _usart_busy; -} - #ifdef _IOE_USART_INBUFFER uint8_t usart_inbuffered(void) { uint8_t rtn; @@ -225,4 +211,5 @@ SIGNAL(USART_UDRE_vect) { usart_sent(); } -#endif +#endif /* MCUSUPPORT_USART */ +#endif /* CONFIG_IOE_USART */ diff --git a/src/usi_spi.c b/src/usi_spi.c new file mode 100644 index 0000000..01c37f7 --- /dev/null +++ b/src/usi_spi.c @@ -0,0 +1,54 @@ +#include "../usi_spi.h" +#include "../mcu/mcu_def.h" + +inline void usi_spi_init(enum spiMode mode) { + if (mode == USI_SPI_MODE_MASTER) { + // Set USCK and DO as output + DDR_USI |= _BV(DD_USCK) | _BV(DD_DO); + // Set DI pull up resistor + PORT_USI |= _BV(PORT_DI); + + USICR |= _BV(USIWM0) | _BV(USICS1) | _BV(USICLK); + } else { + // Set DO as output + DDR_USI |= _BV(DD_DO); + // Set USCK and DI pull up resistor + PORT_USI |= _BV(PORT_USCK) | _BV(PORT_DI); + + USICR |= _BV(USIWM0) | _BV(USICS1) | _BV(USIOIE); + } +} + +inline int8_t usi_spi_busy(void) { + if (interface == SPI_INTERFACE_USI) + return USISR & 0x0F; +} + +inline void usi_spi_join(void) { + while (spi_busy(interface)); +} + +inline uint8_t usi_spi_send(uint8_t data) { + while (spi_busy(interface)); + return spi_transfer(interface, data); +} + +inline uint8_t usi_spi_transfer(uint8_t data) { + // TODO rewrite and this for noninterupt + if (interface == SPI_INTERFACE_USI) { + _spi_usi_busy = 1; + USISR |= _BV(USIOIF); + USIDR = d; + do { + USICR |= _BV(USITC); + } while (!(USISR & _BV(USIOIF))); + return USIDR; + } +} + +inline void usi_spi_expose(uint8_t data) { + if (interface == SPI_INTERFACE_USI) + USIDR = data; +} + +////// Interrupts //////////////////////////////// |